On Tuesday 07 April 2009 22:16:08 Ward Vandewege wrote: > On Sat, Apr 04, 2009 at 12:54:52PM +0200, Harald Gutmann wrote: > > On Friday 03 April 2009 21:33:15 Ward Vandewege wrote: > > The first part of your message was fine to read, but this one worries me > > a little bit. > > > > > However, I got this after having the machine up for a while: > > > > > > [ 999.664992] Uhhuh. NMI received for unknown reason 00. > > > [ 999.665144] Uhhuh. NMI received for unknown reason a1. > > > [ 999.665147] You have some hardware problem, likely on the PCI bus. > > > [ 999.665149] Dazed and confused, but trying to continue > > > [ 999.667309] Do you have a strange power saving mode enabled? > > > [ 999.667309] Dazed and confused, but trying to continue > > > > > > This was right after I did > > > > > > cat /proc/interrupts > > > > > > a couple times - but that may have been a coincidence. > > > > I think it could have been a coincidence, but i'd be interested in > > further details, as this is maybe a result of a "wrong" mptable setup. > > OK. > > > Which kernel version did you use on which distribution? > > Linux radio 2.6.27-7-generic #1 SMP Tue Nov 4 19:33:06 UTC 2008 x86_64 > GNU/Linux > > That's on ubuntu 8.10, 64 bit as you can see. > > > dmesg output, lspci output, /proc/interrupts, and anything else which > > could be interesting. :) > > Sure. This is with the f14 bios: > > > http://ward.vandewege.net/coreboot/m57sli/v1.1/m57sli-v1.1-f14-nic-in-black >-pcie-lspci > http://ward.vandewege.net/coreboot/m57sli/v1.1/m57sli-v1.1-f14-nic-in-black >-pcie-lspci-vvvvvxxxxxx > http://ward.vandewege.net/coreboot/m57sli/v1.1/m57sli-v1.1-f14-nic-in-black >-pcie-dmesg > http://ward.vandewege.net/coreboot/m57sli/v1.1/m57sli-v1.1-f14-nic-in-black >-pcie-cat-proc-interrupts > http://ward.vandewege.net/coreboot/m57sli/v1.1/m57sli-v1.1-f14-nic-in-black >-pcie-acpidump > > And this is with your latest patch: > > http://ward.vandewege.net/coreboot/m57sli/v1.1/m57sli-v1.1-cb-interrupt-pat >ch-20090403-nic-in-black-pcie-lspci > http://ward.vandewege.net/coreboot/m57sli/v1.1/m57sli-v1.1-cb-interrupt-pat >ch-20090403-nic-in-black-pcie-lspci-vvvvvxxxxxx > http://ward.vandewege.net/coreboot/m57sli/v1.1/m57sli-v1.1-cb-interrupt-pat >ch-20090403-nic-in-black-pcie-dmesg > http://ward.vandewege.net/coreboot/m57sli/v1.1/m57sli-v1.1-cb-interrupt-pat >ch-20090403-nic-in-black-pcie-cat-proc-interrupts > http://ward.vandewege.net/coreboot/m57sli/v1.1/m57sli-v1.1-cb-interrupt-pat >ch-20090403-nic-in-black-pcie-acpidump > > The machine seems a bit unhappy - sluggish over ssh but not on console. X > was sucking up a lot of CPU too. Something isn't quite right I think. That's also my opinion, maybe most of the code in the tree is right for v1 (especially the dwords), and just a few lines are false/missing.
Maybe this patch is enough for v1. > Thanks, > Ward. Kind regards, Harald
Index: mptable.c
===================================================================
--- mptable.c (revision 4027)
+++ mptable.c (working copy)
@@ -88,13 +88,13 @@
smp_write_ioapic(mc, apicid_mcp55, 0x11, res->base);
}
- dword = 0x43c6c643;
+ dword = 0x0030C003; //TODO: Check again and verify if hw:v1 is equal.
pci_write_config32(dev, 0x7c, dword);
- dword = 0x81001a00;
+ dword = 0x2D010A09; //TODO: Check again and verify if hw:v1 is equal.
pci_write_config32(dev, 0x80, dword);
- dword = 0xd0001202;
+ dword = 0x8E10D202; //TODO: Check again and verify if hw:v1 is equal.
pci_write_config32(dev, 0x84, dword);
}
@@ -128,33 +128,37 @@
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,\
bus_mcp55[bus], (((dev)<<2)|(fn)), apicid_mcp55, (pin))
- PCI_INT(0,sbdn+1,1, 10); /* SMBus */
PCI_INT(0,sbdn+2,0, 22); /* USB */
PCI_INT(0,sbdn+2,1, 23); /* USB */
- PCI_INT(0,sbdn+6,1, 23); /* HD Audio */
- PCI_INT(0,sbdn+5,0, 20); /* SATA */
- PCI_INT(0,sbdn+5,1, 23); /* SATA */
- PCI_INT(0,sbdn+5,2, 21); /* SATA */
+ PCI_INT(0,sbdn+4,0, 14); /* IDE */
+ PCI_INT(0,sbdn+5,0, 22); /* SATA */
+ PCI_INT(0,sbdn+5,1, 21); /* SATA */
+ PCI_INT(0,sbdn+5,2, 20); /* SATA */
+ PCI_INT(0,sbdn+6,1, 21); /* HD Audio */
- PCI_INT(0,sbdn+8,0, 22); /* GBit Ether */
+ /* NOTE: udev renames eth0 to eth1 because of
+ different mac addresses. The coreboot MAC address
+ is stored in src/southbridge/nvidia/mcp55/romstrap.inc
+ */
+ PCI_INT(0,sbdn+8,0, 22); /* GBit Ether */
+
+ /* TODO: why does the bus nummber increase to 7
+ when using coreboot (proprietary bios bus for
+ pci-e 16x is 2)?
+ Maybe this is related to get_bus_conf.c #DEBUG# */
+ PCI_INT(2,sbdn+0,0, 16); //PCI-E 16x #2 (black) on hw:v2
+ PCI_INT(7,sbdn+0,0, 16); //PCI-E 16x #1 (blue) on hw:v2
- /* The PCIe slots, each on its own bus */
- for(j=7; j>=2; j--) {
- if(!bus_mcp55[j]) continue;
- for(i=0;i<4;i++) { /* map all functions */
- PCI_INT(j,0,i, 16+(1+j+i)%4);
- }
- }
+ /* TODO: clear out why PCI 0.0a-0.0f are available,
+ while just 0.0f should be enough */
+
+ PCI_INT(1,sbdn+7,0, 19); /* PCI #1 (near cpu) on hw:v2 */
+ PCI_INT(1,sbdn+8,0, 16); /* PCI #2 (near edge) on hw:v2 */
- /* On bus 1: the physical PCI bus slots... */
- for(j=0; j<2; j++) /* on a Rev 1.x board, they are devs 7 and 8 */
- for(i=0;i<4;i++) { /* map all functions */
- PCI_INT(1,7+j,i, 16+(3+i+j)%4);
- }
/* ... and OB FireWire */
PCI_INT(1,0x0a,0, 18);
-/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
+ /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
smp_write_intsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
/* There is no extension information... */
signature.asc
Description: This is a digitally signed message part.
-- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
