On 07.05.2009 15:14, Carl-Daniel Hailfinger wrote: > Chips like the SST SST25VF080B can only handle single byte writes > outside AAI mode. > > Change SPI architecture to handle 1-byte chunk chip writing differently > from 256-byte chunk chip writing. > > Convert all flashchips.c entries with SPI programing to the 256-byte > version by default. > > Change the flashchips entry for SST SST25VF080B to 1-byte writing. >
Tested by Ali Nadalizadeh. > Signed-off-by: Carl-Daniel Hailfinger <[email protected]> > Acks please? Regards, Carl-Daniel -- http://www.hailfinger.org/ -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
