> It's basically really just a fixed address memory space of a certain fixed > size that needs to be kept free by the resource allocator, very similar to > the way it needs to be done for the IOAPIC and Local APIC. Great. That makes it easy.
> Since the PCIe BAR is part of the northbridge, I tried to tell the resource > allocator to do this in the northbridge.c code, but I couldn't seem to > figure out a way to make the (old) allocator honor it. There was no check for fixed resources before. There was a #warning in compute_allocate_resources about it. It just set the limits below 0xfec00000, and as long as your fixed resources were above that you were fine. The gotcha here is that I haven't implemented fixed resources in the middle of the rest of the PCI memory address space. If you declare a fixed region 0xf4000000-0xf4000007 you can no longer use 0xf4000008-0xfec00000. All of the PCI BARs have to fit on one side (above or below) the fixed regions. I don't think that's much of an issue, but it is there. Thanks, Myles -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
