On Thu, Jun 11, 2009 at 01:06:05AM +0200, Luc Verhaegen wrote: > On Tue, Jun 09, 2009 at 09:18:58PM +0200, Harald Gutmann wrote: > > Hello, > > > > after a few tries of me to fix the interrupt problems which occurred on the > > M57SLI here is the final patch from me. > > > > The Patch fixes the following issues on M57SLI: > > * Interrupt routing in the MPTable > > > > which affects the following hardware parts: > > * PCI-E 16x Slots (blue and black) - both are working now like a charm > > * PCI-E 1x Slots - all three should be fine, but I have no card to test. > > (untested) > > * PCI Slots - both work fine now. > > > > This is the first and (hopefully) the last patch on this issue which gets a > > > > Signed-off-by: Harald Gutmann <[email protected]> > > > > from me. > > > > I'm really looking forward to commit this patch (which is my first one) and > > mark the interrupt issues on the wiki page to the M57SLI as solved. :) > > > > > > Kind regards, > > Harald Gutmann > > > > > > > @@ -87,19 +87,17 @@ > > if (res) { > > smp_write_ioapic(mc, apicid_mcp55, 0x11, > > res->base); > > } > > - > > - dword = 0x43c6c643; > > + dword = 0xc643c643; > > pci_write_config32(dev, 0x7c, dword); > > > > - dword = 0x81001a00; > > + dword = 0x8da01009; > > pci_write_config32(dev, 0x80, dword); > > > > - dword = 0xd0001202; > > + dword = 0x200018d2; > > pci_write_config32(dev, 0x84, dword); > > - > > } > > } > > - > > + > > Anal stuff: while you're here, do get rid of dword :) > > > /* The PCIe slots, each on its own bus */ > > - for(j=7; j>=2; j--) { > > - if(!bus_mcp55[j]) continue; > > - for(i=0;i<4;i++) { /* map all functions */ > > - PCI_INT(j,0,i, 16+(1+j+i)%4); > > - } > > - } > > + k = 1; > > + for(i=0; i<=3; i++){ > > + for(j=7; j>=2; j--){ > > + if(k>3) k=0; > > + PCI_INT(j,0,i, 16+k); > > + k++; > > + } > > + k--; > > + } > > Anal stuff: i<4 and j>1 is easier on the eye :) > > > > > /* On bus 1: the physical PCI bus slots... */ > > - for(j=0; j<2; j++) /* on a Rev 1.x board, they are devs 7 and 8 */ > > - for(i=0;i<4;i++) { /* map all functions */ > > - PCI_INT(1,7+j,i, 16+(3+i+j)%4); > > - } > > - /* ... and OB FireWire */ > > - PCI_INT(1,0x0a,0, 18); > > + k=2; > > + for(i=0; i<=3; i++){ > > + for(j=6; j<=10; j++){ > > + if(k>3) k=0; > > + PCI_INT(1,j,i, 16+k); > > + k++; > > + } > > + } > > This is the only bit i have a real question about: you remove the comment: > /* on a Rev 1.x board, they are devs 7 and 8 */ > and have gone from 7+[0,1] to [6,7,8,9,10] for the devices. > > While i like the for loops used this way, you are touching devices 6,9,10 > which weren't touched before. What board revision are you using? Could this > be the difference between your board and what yinghai had? What possible > effects are there with assigning irqs in the apic to devices which possibly > aren't there (as i have no clue about apics)? > > Please keep at least some of Yinghai's comment and expand this with your > information. > > This is the only question i have with this change, if i see a good answer > to this, you have: > > Acked-by: Luc Verhaegen <[email protected]> > > Luc Verhaegen.
Apparently the email in the copyright statement was no longer valid. Yinghai, maybe you should traverse over the tree and adjust it everywhere :) Luc Verhaegen. -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
