On Tue, Jun 16, 2009 at 7:24 AM, Arnaud Maye<[email protected]> wrote: > I've just received my UART dongle and I could see that indeed something has > been sent over UART. > > The first error seen was about the fact only ECC DIMMs are allowed, in the > devkit they provide > non-ecc memory. Is it normal coreboot only supports ECC DIMMs?
No, but I never got around to implementing support for non-ECC DIMMs in the EP80579 raminit code. It shouldn't be too hard--I think you just need to note whether the DIMMs are ECC, and refrain from enabling ECC mode if they are. (You may want to keep ECC disabled anyway during debugging; until the DRAM is stable, ECC only makes the error behavior more complicated.) > I've then plugged some nice kingston DIMM with ecc and what I get then is an > exception : > > Unexpected Exception: 13 @ 10:00002f08 - Halting > Code: 4096 eflags: 00010282 > eax: 002163b6 ebx: 0000c000 ecx: 0000227e edx: fffffffe > edi: 0000eb02 esi: 0000f444 ebp: 0000bebc esp: 0000bebc > > As soon I get this exception, the 7 segments display : FF > > I guess if this is the first thing I get, coreboot has a problem not the > payload, right? > > Could you tell me which coreboot version from the 1.3 tree you have been > using when you > validated the port? I did the work somewhere around revision 3650 of the coreboot-v2 tree. However, I tested only a very limited number of DIMMs, and only at 667 speed, so I'm not surprised a random one doesn't work. Unfortunately there's no substitute for spending some quality time with the datasheet, beating the raminit settings into submission. --Ed -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
