Author: stepan Date: Fri Apr 23 21:16:30 2010 New Revision: 5484 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5484
Log: zero warnings days... Signed-off-by: Stefan Reinauer <[email protected]> Acked-by: Stefan Reinauer <[email protected]> Modified: trunk/src/northbridge/amd/amdk8/amdk8_f_pci.c trunk/src/northbridge/amd/amdk8/incoherent_ht.c trunk/src/southbridge/amd/rs690/rs690.c trunk/src/southbridge/amd/rs690/rs690_pcie.c trunk/src/southbridge/nvidia/ck804/ck804_early_setup.c Modified: trunk/src/northbridge/amd/amdk8/amdk8_f_pci.c ============================================================================== --- trunk/src/northbridge/amd/amdk8/amdk8_f_pci.c Fri Apr 23 19:37:41 2010 (r5483) +++ trunk/src/northbridge/amd/amdk8/amdk8_f_pci.c Fri Apr 23 21:16:30 2010 (r5484) @@ -1,6 +1,7 @@ #ifndef AMDK8_F_PCI_C - #define AMDK8_F_PCI_C + +#ifdef UNUSED_CODE /* bit [10,8] are dev func, bit[1,0] are dev index */ static uint32_t pci_read_config32_index(device_t dev, uint32_t index_reg, uint32_t index) { @@ -15,16 +16,14 @@ static void pci_write_config32_index(device_t dev, uint32_t index_reg, uint32_t index, uint32_t data) { - pci_write_config32(dev, index_reg, index); pci_write_config32(dev, index_reg + 0x4, data); - } +#endif static uint32_t pci_read_config32_index_wait(device_t dev, uint32_t index_reg, uint32_t index) { - uint32_t dword; index &= ~(1<<30); @@ -41,7 +40,6 @@ static void pci_write_config32_index_wait(device_t dev, uint32_t index_reg, uint32_t index, uint32_t data) { - uint32_t dword; pci_write_config32(dev, index_reg + 0x4, data); @@ -51,7 +49,6 @@ do { dword = pci_read_config32(dev, index_reg); } while (!(dword & (1<<31))); - } #endif Modified: trunk/src/northbridge/amd/amdk8/incoherent_ht.c ============================================================================== --- trunk/src/northbridge/amd/amdk8/incoherent_ht.c Fri Apr 23 19:37:41 2010 (r5483) +++ trunk/src/northbridge/amd/amdk8/incoherent_ht.c Fri Apr 23 21:16:30 2010 (r5484) @@ -576,6 +576,7 @@ return reset_needed; } +#if defined(CONFIG_SOUTHBRIDGE_NVIDIA_CK804) || defined(CONFIG_SOUTHBRIDGE_NVIDIA_MCP55) static int set_ht_link_buffer_count(uint8_t node, uint8_t linkn, uint8_t linkt, unsigned val) { uint32_t dword; @@ -601,6 +602,7 @@ return 0; } + static int set_ht_link_buffer_counts_chain(uint8_t ht_c_num, unsigned vendorid, unsigned val) { int reset_needed; @@ -632,7 +634,7 @@ return reset_needed; } - +#endif #if RAMINIT_SYSINFO == 1 static void ht_setup_chains(uint8_t ht_c_num, struct sys_info *sysinfo) Modified: trunk/src/southbridge/amd/rs690/rs690.c ============================================================================== --- trunk/src/southbridge/amd/rs690/rs690.c Fri Apr 23 19:37:41 2010 (r5483) +++ trunk/src/southbridge/amd/rs690/rs690.c Fri Apr 23 21:16:30 2010 (r5484) @@ -104,8 +104,7 @@ set_htiu_enable_bits(nb_dev, 0x05, 7 << 8, 7 << 8); } - -u32 get_vid_did(device_t dev) +static u32 get_vid_did(device_t dev) { return pci_read_config32(dev, 0); } Modified: trunk/src/southbridge/amd/rs690/rs690_pcie.c ============================================================================== --- trunk/src/southbridge/amd/rs690/rs690_pcie.c Fri Apr 23 19:37:41 2010 (r5483) +++ trunk/src/southbridge/amd/rs690/rs690_pcie.c Fri Apr 23 21:16:30 2010 (r5484) @@ -105,6 +105,7 @@ } } +#ifdef UNUSED_CODE static void pcie_init(struct device *dev) { /* Enable pci error detecting */ @@ -118,6 +119,7 @@ dword |= (1 << 30); /* Clear possible errors */ pci_write_config32(dev, 0x04, dword); } +#endif /********************************************************************** **********************************************************************/ @@ -355,6 +357,7 @@ ValidatePortEn(nb_dev); } +#ifdef UNUSED_CODE /***************************************** * Compliant with CIM_33's PCIEMiscClkProg *****************************************/ @@ -395,3 +398,4 @@ reg &= ~(1 << 0); pci_write_config32(nb_dev, 0x4c, reg); } +#endif Modified: trunk/src/southbridge/nvidia/ck804/ck804_early_setup.c ============================================================================== --- trunk/src/southbridge/nvidia/ck804/ck804_early_setup.c Fri Apr 23 19:37:41 2010 (r5483) +++ trunk/src/southbridge/nvidia/ck804/ck804_early_setup.c Fri Apr 23 21:16:30 2010 (r5484) @@ -3,6 +3,8 @@ * by [email protected] */ +#include <reset.h> + static int set_ht_link_ck804(uint8_t ht_c_num) { unsigned vendorid = 0x10de; -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
