Author: ruik Date: Fri Apr 23 22:58:13 2010 New Revision: 5485 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5485
Log: Attached patch adds support for tinybootblock on VT8237* to decode whole flash independent of strapping, making larger flashes work. We cannot walk anything else than PCI bus 0 because HT is not setup yet. Signed-off-by: Rudolf Marek <[email protected]> Acked-by: Stefan Reinauer <[email protected]> Acked-by: Myles Watson <[email protected]> Added: trunk/src/southbridge/via/vt8237r/bootblock.c Modified: trunk/src/southbridge/via/vt8237r/Kconfig Modified: trunk/src/southbridge/via/vt8237r/Kconfig ============================================================================== --- trunk/src/southbridge/via/vt8237r/Kconfig Fri Apr 23 21:16:30 2010 (r5484) +++ trunk/src/southbridge/via/vt8237r/Kconfig Fri Apr 23 22:58:13 2010 (r5485) @@ -25,3 +25,8 @@ bool default n depends on SOUTHBRIDGE_VIA_VT8237R + +config BOOTBLOCK_SOUTHBRIDGE_INIT + string + default "southbridge/via/vt8237r/bootblock.c" + depends on SOUTHBRIDGE_VIA_VT8237R Added: trunk/src/southbridge/via/vt8237r/bootblock.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/src/southbridge/via/vt8237r/bootblock.c Fri Apr 23 22:58:13 2010 (r5485) @@ -0,0 +1,46 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2010 Rudolf Marek <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/io.h> +#include <arch/romcc_io.h> +#include <device/pci_ids.h> + +static void bootblock_southbridge_init(void) +{ + device_t dev; + /* don't walk other busses, HT is not enabled */ + + /* ROM decode last 8MB FF800000 - FFFFFFFF on VT8237S/VT8237A */ + /* ROM decode last 4MB FFC00000 - FFFFFFFF on VT8237R */ + + /* Power management controller */ + dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA, + PCI_DEVICE_ID_VIA_VT8237R_LPC), 0); + + if (dev == PCI_DEV_INVALID) { + /* Power management controller */ + dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA, + PCI_DEVICE_ID_VIA_VT8237S_LPC), 0); + + if (dev == PCI_DEV_INVALID) + return; + } + + pci_write_config8(dev, 0x41, 0x7f); +} -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
