>> I think there must be some MTRR setup problem. Maybe you could print out >> the MTRRs just before the slow parts? > > Here's a dump of various MSRs right after the call to raminit_amdmct() > in romstage.c:
> /* fixed MTRRs */ > msr 00000250=1e1e1e1e1e1e1e1e > msr 00000258=1e1e1e1e1e1e1e1e > msr 00000259=0000000000000000 > msr 00000268=1e1e1e1e00000000 > msr 00000269=1e1e1e1e1e1e1e1e > msr 0000026a=0000000000000000 > msr 0000026b=0000000000000000 > msr 0000026c=0404040404040404 > msr 0000026d=0404040404040404 > msr 0000026e=0404040404040404 > msr 0000026f=0404040404040404 I don't understand these values. I would have expected msr 00000268=1e1e1e1e1e1e1e1e (0xc0000-c7fff) (only if CAR size = 64K) msr 00000269=1e1e1e1e1e1e1e1e (0xc8000-cffff) Why are we setting anything in the 0-0x80000 range ( msr 0x250) or the 0x80000-0x9ffff range (msr 0x258)? Same question for 0xe0000-0xfffff (0x26d-26f). Thanks, Myles -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
