Hi all, Intel model 6bx CPUs (specifically 6B1 and 6B4) can end up in a lot of places, specifically Slot 1 and Socket 370. Ever since references to them were removed from cpu/intel/model_6xx my coreboot would die when initializing CPU with a "Unknown cpu" error. This patch fixes it by adding references to model_6bx to cpu/intel/slot_1 and cpu/intel/socket_PGA370. Also included are before and after boot logs with relevant sections highlighted.
Before boot log: http://coreboot.pastebin.com/CGWgihaG After boot log: http://coreboot.pastebin.com/GLgnpZT6 Signed-off-by: Keith Hui <[email protected]> ----- Begin patch ----- Index: src/cpu/intel/slot_1/Makefile.inc =================================================================== --- src/cpu/intel/slot_1/Makefile.inc (revision 5527) +++ src/cpu/intel/slot_1/Makefile.inc (working copy) @@ -20,6 +20,7 @@ obj-y += slot_1.o subdirs-y += ../model_6xx +subdirs-y += ../model_6bx subdirs-y += ../../x86/tsc subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/lapic Index: src/cpu/intel/socket_PGA370/Makefile.inc =================================================================== --- src/cpu/intel/socket_PGA370/Makefile.inc (revision 5527) +++ src/cpu/intel/socket_PGA370/Makefile.inc (working copy) @@ -20,6 +20,7 @@ obj-y += socket_PGA370.o subdirs-y += ../model_6xx +subdirs-y += ../model_6bx subdirs-y += ../../x86/tsc subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/lapic ----- End patch ----- -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
