mbertens wrote: > > We don't normally use CONFIG values to set registers. Should > > they really be configurable? > > > > +pci_write_config8( dev, 0x0C, CONFIG_DEC21143_CACHE_LINE_SIZE ); > > On my system it was needed to set this specific value to 0, but > some will need 0x40 (64).
What some? Can you explain this more? //Peter -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
