on 14/07/2010 23:25 Peter Stuge said the following: > Andriy Gapon wrote: >> In this context I would really appreciate "unabridged" version of >> ITE IT8718F-S specification. > > Maybe you already know this, but I would not expect the superio to be > involved very much in the dualbios mechanism - at most an IO pin > would be used for the handshake with the patented timer.
Still I would like to get the spec. It may also depend on a particular motherboard, chip, etc. Perhaps the "patented timer" is implemented in Super I/O. At least, we see that some undocumented Super I/O register(s) are used to switch between the flash chips and some other related things. -- Andriy Gapon -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
