On Thu, Aug 5, 2010 at 1:58 PM, Oskar Enoksson <[email protected]> wrote: > On 08/05/2010 08:03 PM, Myles Watson wrote: >> On Thu, Aug 5, 2010 at 9:59 AM, Oskar Enoksson <[email protected]> wrote: >> >>> Hello. Sorry to bother you all with a BIOS problem ... >>> >>> I have a large number of old HP DL145 G1 servers with two Opteron >>> 248 each (single core). I want to upgrade the CPU's to Opteron 280 >>> (dualcore). >>> >>> I have tried to simply install two 280 CPU's and boot up. The BIOS bootup >>> process first seems to work fine >>> detecting the harddrive, USB, management processor, memory etc. Then >>> there is a warning text "Warning: Unknown processor. Please contact your >>> BIOS vendor for appropriate updates". After that it detects the BMC >>> >>> I already have the last BIOS available from HP (from 21/7 2005) >>> installed. >>> >>> Would it be possible to tweak coreboot to make these servers work with >>> dualcore CPU's? >>> >> Definitely possible. Probably pretty easy. It's very similar to the >> amd serengeti_cheetah. If you want to support it, you could start by >> running superiotool to find out what superio you have. If it is the >> same as serengeti_cheetah there should be very little work required to >> support it. >> >> The wiki has useful information about superiotool and getting started. >> >> Thanks, >> Myles >> > Thanks for responding! > > I compiled superiotool from coreboot trunk, and flashrom from the latest > release 0.9.2. The output from "superiotool", "superiotool -dV" and > "flashrom -V" follows. I hope someone can make something out of it. As > for Serengeti Cheetah compared to Serenade I see the numbers 8111, 8151 > and 8132 listed for Serengeti, but my lspci only mentions 8111 and 8131. > How significant is that?
Significant. Try the tyan/s2880, tyan/s2882, or another similar one. They have the same superio too. I think you'd get some debug output right away if you just flashed a s2880 image to your board and watched the serial port. You may need to modify src/mainboard/tyan/s2880/devicetree.cb There's no ACPI support for that board, so if you need that you'll have to implement it. > [r...@cl001 superiotool]# ./superiotool > superiotool r > Found Winbond W83627HF/F/HG/G (id=0x52, rev=0x3a) at 0x2e > [r...@cl001 superiotool]# ./superiotool -dV > superiotool r > Found Winbond W83627HF/F/HG/G (id=0x52, rev=0x3a) at 0x2e > Register dump: > idx 02 20 21 22 23 24 25 26 28 29 2a 2b 2c 2e 2f > val ff 52 3a ff fe 80 00 00 00 00 7c 01 ff 00 ff > def 00 52 NA ff 00 MM 00 00 00 00 7c c0 00 00 00 > LDN 0x00 (Floppy) > idx 30 60 61 70 74 f0 f1 f2 f4 f5 > val 00 03 f0 06 02 0e 00 ff 00 00 > def 01 03 f0 06 02 0e 00 ff 00 00 > LDN 0x01 (Parallel port) > idx 30 60 61 70 74 f0 > val 00 03 78 07 03 3f > def 01 03 78 07 04 3f > LDN 0x02 (COM1) > idx 30 60 61 70 f0 > val 00 03 f8 04 00 > def 01 03 f8 04 00 > LDN 0x03 (COM2) > idx 30 60 61 70 f0 f1 > val 00 02 f8 03 00 00 > def 01 02 f8 03 00 00 > LDN 0x05 (Keyboard) > idx 30 60 61 62 63 70 72 f0 > val 01 00 60 00 64 01 0c 42 > def 01 00 60 00 64 01 0c 80 > LDN 0x06 (Consumer IR) > idx 30 60 61 70 > val 00 00 00 00 > def 00 00 00 00 > LDN 0x07 (Game port, MIDI port, GPIO 1) > idx 30 60 61 62 63 70 f0 f1 f2 > val 00 02 01 03 30 09 ff ff ff > def 00 02 01 03 30 09 ff 00 00 > LDN 0x08 (GPIO 2, watchdog timer) > idx 30 f0 f1 f2 f3 f5 f6 f6 f7 > val 00 ff ff ff 00 40 00 00 00 > def 00 ff 00 00 00 00 00 00 00 > LDN 0x09 (GPIO 3) > idx 30 f0 f1 f2 f3 > val 00 ff ff ff 00 > def 00 ff 00 00 00 > LDN 0x0a (ACPI) > idx 30 70 e0 e1 e2 e3 e4 e5 e6 e7 f0 f1 f3 f4 f6 f7 f9 fe ff > val 01 00 00 00 10 00 a0 00 00 00 00 8f 10 00 00 20 05 00 00 > def 00 00 00 00 NA NA 00 00 00 00 00 00 00 00 00 00 00 00 00 > LDN 0x0b (Hardware monitor) > idx 30 60 61 70 f0 > val 01 02 90 00 00 > def 00 00 00 00 00 > [r...@cl001 flashrom-0.9.2]# ./flashrom -V > flashrom v0.9.2-r1001 on Linux 2.6.33.7-dl145 (x86_64), built with > libpci 2.2.3, GCC 4.1.2 20080704 (Red Hat > 4.1.2-46) > > flashrom is free software, get the source code at > http://www.flashrom.org > > Found chip "SST SST49LF040" (512 KB, LPC) at physical address > 0xfff80000. If you get stuck, the Wiki is your friend. You can also send your serial logs to the mailing list with questions. Good luck, Myles -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
