Author: stepan Date: Sun Aug 22 21:56:47 2010 New Revision: 5734 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5734
Log: RB_C3 and HY-D0 should also apply the workaround for errata 344, according to Revision Guide for AMD Family10h processors (#41322) rev 3.74 June 2010 My processor wasn't getting the workaround Signed-off-by: Xavi Drudis Ferran <[email protected]> Acked-by: Stefan Reinauer <[email protected]> Modified: trunk/src/cpu/amd/model_10xxx/defaults.h Modified: trunk/src/cpu/amd/model_10xxx/defaults.h ============================================================================== --- trunk/src/cpu/amd/model_10xxx/defaults.h Sun Aug 22 21:54:26 2010 (r5733) +++ trunk/src/cpu/amd/model_10xxx/defaults.h Sun Aug 22 21:56:47 2010 (r5734) @@ -321,9 +321,9 @@ u32 mask; } fam10_htphy_default[] = { - /* Errata 344 - Fam10 C2/D0 + /* Errata 344 - Fam10 C2/D0 -- FIXME at 25.6.2010 should be for ((RB|BL|DA)-C[23])|(HY-D[01])|(PH-E0) but I don't find constants for all of them * System software should set bit 6 of F4x1[9C, 94, 8C, 84]_x[78:70, 68:60]. */ - { 0x60, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + { 0x60, AMD_DRBH_Cx , AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, 0x00000040, 0x00000040 }, { 0x61, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, 0x00000040, 0x00000040 }, -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
