Author: stepan
Date: Sun Aug 22 21:59:27 2010
New Revision: 5735
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5735

Log:
RB_C3  should also apply the workaround for errata 354, according to
Revision Guide for AMD Family10h processors (#41322) rev 3.74 June 2010

Signed-off-by: Xavi Drudis Ferran <[email protected]>
Acked-by: Stefan Reinauer <[email protected]>

Modified:
   trunk/src/cpu/amd/model_10xxx/defaults.h

Modified: trunk/src/cpu/amd/model_10xxx/defaults.h
==============================================================================
--- trunk/src/cpu/amd/model_10xxx/defaults.h    Sun Aug 22 21:56:47 2010        
(r5734)
+++ trunk/src/cpu/amd/model_10xxx/defaults.h    Sun Aug 22 21:59:27 2010        
(r5735)
@@ -361,44 +361,44 @@
        { 0x78, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3 | AMD_HY_D0, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
          0x00000040, 0x00000040 },
 
-       /* Errata 354 - Fam10 C2
+       /* Errata 354 - Fam10 C2 - FIXME at 25.6.2010 affects RB-C2, 
BL-C2,DA-C2,RB-C3,BL-C3,DA-C3, but BL-C[23] have no constants
         * System software should set bit 6 of F4x1[9C,94,8C,84]_x[58:50, 
48:40] for all links. */
-       { 0x40, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
+       { 0x40, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
          0x00000040, 0x00000040 },
-       { 0x41, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
+       { 0x41, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
          0x00000040, 0x00000040 },
-       { 0x42, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
+       { 0x42, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
          0x00000040, 0x00000040 },
-       { 0x43, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
+       { 0x43, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
          0x00000040, 0x00000040 },
-       { 0x44, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
+       { 0x44, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
          0x00000040, 0x00000040 },
-       { 0x45, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
+       { 0x45, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
          0x00000040, 0x00000040 },
-       { 0x46, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
+       { 0x46, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
          0x00000040, 0x00000040 },
-       { 0x47, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
+       { 0x47, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
          0x00000040, 0x00000040 },
-       { 0x48, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
+       { 0x48, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
          0x00000040, 0x00000040 },
 
-       { 0x50, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
+       { 0x50, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
          0x00000040, 0x00000040 },
-       { 0x51, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
+       { 0x51, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
          0x00000040, 0x00000040 },
-       { 0x52, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
+       { 0x52, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
          0x00000040, 0x00000040 },
-       { 0x53, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
+       { 0x53, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
          0x00000040, 0x00000040 },
-       { 0x54, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
+       { 0x54, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
          0x00000040, 0x00000040 },
-       { 0x55, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
+       { 0x55, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
          0x00000040, 0x00000040 },
-       { 0x56, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
+       { 0x56, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
          0x00000040, 0x00000040 },
-       { 0x57, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
+       { 0x57, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
          0x00000040, 0x00000040 },
-       { 0x58, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
+       { 0x58, AMD_RB_C2 | AMD_DA_C2 | AMD_RB_C3 | AMD_DA_C3, AMD_PTYPE_ALL, 
HTPHY_LINKTYPE_ALL,
          0x00000040, 0x00000040 },
 
        /* Errata 327 - Fam10 C2/D0

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