Author: stepan Date: Wed Aug 25 20:35:42 2010 New Revision: 5740 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5740
Log: Fix i945 based boards - prevent GCC from inlining do_ram_command - it will break RAM initialization. - fix the PCIRST# mechanism in those boards that do it, it requires 200ms, not 200us - move PCIRST# as early as possible (before ich7_enable_lpc) Signed-off-by: Stefan Reinauer <[email protected]> Acked-by: Corey Osgood <[email protected]> Modified: trunk/src/mainboard/getac/p470/romstage.c trunk/src/mainboard/kontron/986lcd-m/romstage.c trunk/src/mainboard/roda/rk886ex/romstage.c trunk/src/northbridge/intel/i945/raminit.c Modified: trunk/src/mainboard/getac/p470/romstage.c ============================================================================== --- trunk/src/mainboard/getac/p470/romstage.c Tue Aug 24 14:58:17 2010 (r5739) +++ trunk/src/mainboard/getac/p470/romstage.c Wed Aug 25 20:35:42 2010 (r5740) @@ -308,9 +308,8 @@ #if 0 /* Force PCIRST# */ pci_write_config16(PCI_DEV(0, 0x1e, 0), BCTRL, SBR); - udelay(200); + udelay(200 * 1000); pci_write_config16(PCI_DEV(0, 0x1e, 0), BCTRL, 0); - udelay(200); #endif ich7_enable_lpc(); Modified: trunk/src/mainboard/kontron/986lcd-m/romstage.c ============================================================================== --- trunk/src/mainboard/kontron/986lcd-m/romstage.c Tue Aug 24 14:58:17 2010 (r5739) +++ trunk/src/mainboard/kontron/986lcd-m/romstage.c Wed Aug 25 20:35:42 2010 (r5740) @@ -366,14 +366,12 @@ enable_lapic(); } - ich7_enable_lpc(); - /* Force PCIRST# */ pci_write_config16(PCI_DEV(0, 0x1e, 0), BCTRL, SBR); - udelay(200); + udelay(200 * 1000); pci_write_config16(PCI_DEV(0, 0x1e, 0), BCTRL, 0); - udelay(200); + ich7_enable_lpc(); early_superio_config_w83627thg(); /* Set up the console */ Modified: trunk/src/mainboard/roda/rk886ex/romstage.c ============================================================================== --- trunk/src/mainboard/roda/rk886ex/romstage.c Tue Aug 24 14:58:17 2010 (r5739) +++ trunk/src/mainboard/roda/rk886ex/romstage.c Wed Aug 25 20:35:42 2010 (r5740) @@ -279,11 +279,12 @@ enable_lapic(); } - ich7_enable_lpc(); - /* Force PCIRST# */ pci_write_config16(PCI_DEV(0, 0x1e, 0), BCTRL, SBR); + udelay(200 * 1000); + pci_write_config16(PCI_DEV(0, 0x1e, 0), BCTRL, 0); + ich7_enable_lpc(); early_superio_config(); /* Set up the console */ Modified: trunk/src/northbridge/intel/i945/raminit.c ============================================================================== --- trunk/src/northbridge/intel/i945/raminit.c Tue Aug 24 14:58:17 2010 (r5739) +++ trunk/src/northbridge/intel/i945/raminit.c Wed Aug 25 20:35:42 2010 (r5740) @@ -45,7 +45,7 @@ #define RAM_EMRS_2 (0x1 << 21) #define RAM_EMRS_3 (0x2 << 21) -static void do_ram_command(u32 command) +static __attribute__((noinline)) void do_ram_command(u32 command) { u32 reg32; -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
