Dear coreboot readers!
This is the automatic build system of coreboot.
The developer "uwe" checked in revision 5842 to
the coreboot repository. This caused the following
changes:
Change Log:
Various USB Debug Port fixes (trivial).
- Drop unused DBGP_DEFAULT #defines on boards with chipsets where no
USB Debug Port support is implemented anyway (at the moment, at least):
- hp/dl145_g3
- hp/dl165_g6_fam10
- ICH7: Move unrelated code out of set_debug_port(). All ICH southbridges
with Debug Port hardcode the physical USB port used as Debug Port to 1.
In other words, this port is not user-configurable (as seems to be
the case on NVIDIA MCP55). For now we keep the 'port' parameter in order
to not change the API, this might be fixed differently later.
Signed-off-by: Uwe Hermann <[email protected]>
Acked-by: Uwe Hermann <[email protected]>
Build Log:
Compilation of amd:serengeti_cheetah_fam10 is still broken
See the error log at
http://qa.coreboot.org/log_buildbrd.php?revision=5842&device=serengeti_cheetah_fam10&vendor=amd&num=2
Compilation of hp:dl165_g6_fam10 is still broken
See the error log at
http://qa.coreboot.org/log_buildbrd.php?revision=5842&device=dl165_g6_fam10&vendor=hp&num=2
Compilation of supermicro:h8dmr_fam10 is still broken
See the error log at
http://qa.coreboot.org/log_buildbrd.php?revision=5842&device=h8dmr_fam10&vendor=supermicro&num=2
Compilation of supermicro:h8qme_fam10 is still broken
See the error log at
http://qa.coreboot.org/log_buildbrd.php?revision=5842&device=h8qme_fam10&vendor=supermicro&num=2
Compilation of tyan:s2912_fam10 is still broken
See the error log at
http://qa.coreboot.org/log_buildbrd.php?revision=5842&device=s2912_fam10&vendor=tyan&num=2
If something broke during this checkin please be a pain
in uwe's neck until the issue is fixed.
If this issue is not fixed within 24h the revision should
be backed out.
Best regards,
coreboot automatic build system
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