Am 06.10.2010 19:17, schrieb Uwe Hermann: > Convert all Intel 440BX boards to Cache-as-RAM (CAR). > > - Add "select CACHE_AS_RAM" in src/cpu/intel/slot_1/Kconfig. > > - Add the following in src/cpu/intel/slot_1/Makefile.inc: > cpu_incs += $(src)/cpu/intel/car/cache_as_ram.inc > > - Remove "select ROMCC" from all 440BX board Kconfig files. > > - Drop all early_mtrr_init() calls, that's done by CAR code now. > > Various small fixes were needed to make it build: > > - Drop do_smbus_recv_byte(), do_smbus_send_byte(), do_smbus_write_byte(), > those were never called anyways. > > - Remove the "static" from the main() functions in romstage.c files. > > - Always call dump_spd_registers() from the 440BX debug.c, but use > "#if CONFIG_DEBUG_RAM_SETUP" to only have that code if RAM debugging > is enabled in menuconfig. > > - Drop all "lib/ramtest.c" #includes and ram_check() calls (even if > commented out) from romstage.c's, as we've done for most other boards. > > - Add missing #includes or prototypes. Some of the prototypes will be > removed later when we get rid of the #include'd .c files. > > Abuild-tested for all boards, and boot-tested on A-Trend ATC-6220. > > Signed-off-by: Uwe Hermann <[email protected]> Acked-by: Patrick Georgi <[email protected]>
It looks good, thanks for doing this Regards Patrick -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
