Jeremy Moles wrote: > It's not that the hardware specs are unvailable, it's simply that I > lack the knowledge to be able to translate the information form the > hardware vendor (i.e., their engineer telling me to simply ping > GPIO-03 on the SuperI/O controller and the hardware lights up) into > Linux code. :) In Windows, apparently, it's as easy as that...
If anything I'd say it's more difficult in Windows. > the GPIO registers I need are abstracted away in an LDN (7, in my > case), and I think you need to inform the hardware of that FIRST > before writing any bits. Correct. Looking at chapter 5 it's also clear that actual data for GPIO pins is written using registers offset from an IO base address configured in the logical device. So steps are: set gpio ldn: regwrite(7,7) read io base address: regread(60h)<<8 | regread(61h) read current GPIO-0 value: inb(base address) set bit 3 in value (1<<3) write new GPIO-0 value: outb(base,newval) //Peter -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
