Hi, On Tuesday 24 January 2012 22:26:31 Scott Duplichan wrote: > Prakash Punnoor wrote: > > ]BTW, could you explain what happens after soft_reset? Will coreboot run > ]again from start? > > Yes, the CF9 soft reset starts execution at the reset vector > same as a cold boot.
ah, thanks for the confirmation. > > ] At least the following "die(...)" statement (romstage.c > ]cache_as_ram_main) suggests that program flow should NOT get there. So, if > ]coreboots runs again from start, why doesn't it enable port 80 again like > ]it did initially? > > I am not sure. But the important function is sb7xx_51xx_pci_port80(), > called from line 90 of romstage.c. It looks like that function does > everything needed to enable PCI port 80. You could try calling the > function unconditionally and see what happens. Unfortunately that didn't help. So maybe coreboot isn't reaching cache_as_ram_main after soft_reset anymore. I commented out the call to soft_reset (and die) and now coreboot runs till the device init as on "warm start". Any other ideas how to make soft_reset work? Cheers, Prakash
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