Stefan Reinauer ([email protected]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1826
-gerrit commit 2953b9344e7d3ec93a77ff94d532a5e978c5d792 Author: Stefan Reinauer <[email protected]> Date: Tue Sep 4 10:59:29 2012 -0700 Add PCIe init and NMode flag to PEI data structure The IvyBridge reference code does some slow and extensive PCIe init that we do not need on Link. Hence, add a flag to disable/enable running that init code from coreboot. NMode was used during bringup. We'll switch the setting back to auto, to let MRC decide the right thing. Change-Id: Ia989bb9ea079aadfeb41dc3029b7c2c623e84760 Signed-off-by: Stefan Reinauer <[email protected]> --- src/northbridge/intel/sandybridge/pei_data.h | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/src/northbridge/intel/sandybridge/pei_data.h b/src/northbridge/intel/sandybridge/pei_data.h index cabda3f..8c907c1 100644 --- a/src/northbridge/intel/sandybridge/pei_data.h +++ b/src/northbridge/intel/sandybridge/pei_data.h @@ -31,7 +31,7 @@ #define PEI_DATA_H typedef void (*tx_byte_func)(unsigned char byte); -#define PEI_VERSION 3 +#define PEI_VERSION 4 struct pei_data { uint32_t pei_version; @@ -99,6 +99,17 @@ struct pei_data uint8_t spd_data[4][256]; tx_byte_func tx_byte; int ddr3lv_support; + /* pcie_init needs to be set to 1 to have the system agent initialize + * PCIe. Note: This should only be required if your system has Gen3 devices + * and it will increase your boot time by at least 100ms. + */ + int pcie_init; + /* N mode functionality. Leave this setting at 0. + * 0 Auto + * 1 1N + * 2 2N + */ + int nmode; } __attribute__((packed)); #endif -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
