the following patch was just integrated into master:
commit c52e1065df07c24606381efb7598b1d29dc625b1
Author: Zheng Bao <[email protected]>
Date: Sun Feb 10 21:20:39 2013 +0800
AMD S3: Add missing erasing flash sector for saving MTRR register
It has worked up to now because the region is already erased
the first time the board boots, and every additional boot the
same data is being written over the old data.(by Dave Frodin)
Change-Id: Id334c60668e31d23c1d552d0ace8eb6ae5513e6b
Signed-off-by: Zheng Bao <[email protected]>
Signed-off-by: zbao <[email protected]>
Reviewed-on: http://review.coreboot.org/2304
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <[email protected]>
Reviewed-By: Patrick Georgi <[email protected]> at Mon Feb 11 08:24:01
2013, giving +2
See http://review.coreboot.org/2304 for details.
-gerrit
--
coreboot mailing list: [email protected]
http://www.coreboot.org/mailman/listinfo/coreboot