Dave pointed out that the device ID is actually listed in your coreboot
spew, which shows:
>> PCI: 00:01.0 [1002/9834] enabled
I was wrong last night on the mainboard IDs. The "H" indicates the
mainboard variant. The "E" in IMB-A180E indicates the processor type.
Yours is the low-power CPU and is the same as mine. So the only
difference between our boards is that mine has an LVDS connector. I guess
yours must have two HDMI connectors.
There seems to be something wrong with your SeaBIOS build. You might want
to look at the SeaBIOS config options in
./payloads/external/SeaBIOS/Makefile.inc. Increase the SeaBIOS debug
level by adding a line under the config recipe (echo
"CONFIG_DEBUG_LEVEL=3" >> $(OUT)/seabios/.config).
I don't know how you are building, but you might try a completely clean
build of coreboot using the following commands:
mv .config my.config
make distclean
cp my.config .config
make oldconfig
make
After build, CBFS should look something like this:
coreboot.rom: 4096 kB, bootblocksize 816, romsize 4194304, offset
0x0
alignment: 64 bytes
Name Offset Type Size
cmos_layout.bin 0x0 cmos_layout 1776
pci1002,9834.rom 0x740 optionrom 59904
fallback/payload 0xf180 payload 56683
config 0x1cf40 raw 4564
(empty) 0x1e140 null 7768
hudson/fwm 0x1ffc0 raw 16
hudson/xhci 0x20040 raw 60138
(empty) 0x2eb80 null 5144
hudson/imc 0x2ffc0 raw 65536
fallback/romstage 0x40000 stage 600744
fallback/coreboot_ram 0xd2b00 stage 287645
(empty) 0x118f00 null 2977944
s3nv 0x3effc0 raw 32768
(empty) 0x3f8000 null 31832
You should see something like the following when SeaBIOS is invoked:
. . .
Writing coreboot table at 0xbffee000
rom_table_end = 0xbffee000
... aligned to 0xbfff0000
0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1. 0000000000001000-000000000009ffff: RAM
2. 00000000000c0000-000000009fffffff: RAM
3. 00000000a0000000-00000000afffffff: RESERVED
4. 00000000b0000000-00000000bf13efff: RAM
5. 00000000bf13f000-00000000bfffffff: CONFIGURATION TABLES
6. 00000000c0000000-00000000dfffffff: RESERVED
7. 0000000100000000-000000011fffffff: RAM
Wrote coreboot table at: bffee000, 0x238 bytes, checksum 6eeb
coreboot table: 592 bytes.
Multiboot Information structure has been written.
FREE SPACE 0. bfff6000 0000a000
GDT 1. bf13f200 00000200
IRQ TABLE 2. bf13f400 00001000
SMP TABLE 3. bf140400 00001000
ACPI 4. bf141400 0000b400
SMBIOS 5. bf14c800 00000800
ACPI RESUME 6. bf14d000 00e00000
ACPISCRATCH 7. bff4d000 000a1000
COREBOOT 8. bffee000 00008000
BS: BS_WRITE_TABLES times (us): entry 0 run 1000790 exit 0
Loading segment from rom address 0xffc0f1b8
code (compression=1)
New segment dstaddr 0xe512c memsize 0x1aed4 srcaddr 0xffc0f1f0
filesize 0xdd33
(cleaned up) New segment addr 0xe512c size 0x1aed4 offset
0xffc0f1f0 filesize 0xdd33
Loading segment from rom address 0xffc0f1d4
Entry Point 0x000fc305
Loading Segment: addr: 0x00000000000e512c memsz:
0x000000000001aed4 filesz: 0x000000000000dd33
lb: [0x0000000000200000, 0x000000000038d034)
Post relocation: addr: 0x00000000000e512c memsz:
0x000000000001aed4 filesz: 0x000000000000dd33
using LZMA
[ 0x000e512c, 00100000, 0x00100000) <- ffc0f1f0
dest 000e512c, end 00100000, bouncebuffer bee24f98
Loaded segments
BS: BS_PAYLOAD_LOAD times (us): entry 0 run 43082 exit 0
Jumping to boot code at 000fc305
CPU0: stack: 002cc000 - 002cd000, lowest used address 002cc668,
stack used: 2456 bytes
entry = 0x000fc305
lb_start = 0x00200000
lb_size = 0x0018d034
buffer = 0xbee24f98
>>>>
>>>> SeaBIOS starts here:
>>>>
Start bios (version rel-1.7.2.1-0-g88cb66e-20131126_124147-Mica)
Find memory size
Attempting to find coreboot table
Found coreboot table forwarder.
Now attempting to find coreboot memory map
Found mainboard ASROCK IMB-A180
Ram Size=0xbf13f000 (0x0000000020000000 high)
malloc setup
Relocating low data from 0x000e59d0 to 0x000ef790 (size 2153)
Relocating init from 0x000e6239 to 0xbf124c90 (size 41503)
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