YuSeok, It looks your platform has enabled the Memory Down function.
The MEM_DOWN_DIMM_SPD_DATA structure supposed to be filled with the relative DIMM SPD data as described in comments, for example, DRAMDeviceType =>>> SPD Byte Offset 2 ModuleType =>>> SPD Byte offset 3 DramManufacturerIdLsb =>>> SPD Byte offset 148 To have a look at below links to understand the DDR3's SPD details. http://www.simmtester.com/page/news/showpubnews.asp?num=153 https://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=3&cad=rja&uact=8&ved=0ahUKEwiMxt_PzrfNAhVQF8AKHQfkAJ8QFgg3MAI&url=https%3A%2F%2Fwww.micron.com%2F~%2Fmedia%2Fdocuments%2Fproducts%2Ftechnical-note%2Fdram-modules%2Ftn_04_42.pdf&usg=AFQjCNEBeya4qkEodTkCc1eEjuK5Qdz0YA&sig2=S9r0YXabVNhpO_UfzJqNpQ&bvm=bv.125221236,d.ZGg On Wed, Jun 1, 2016 at 7:53 AM, 김유석 <[email protected]> wrote: > Dear Sir. > > My own product must need a change the value(config) of sdram. Such as > size, speed, and etc. > > > So, I'm try to search and study the coreboot source code, and found out > the "vendorcode/intel/fsp1_0/rangeley/include/fspplatform.h" > > > This header are contained the some structure for setup the sdram. such as > "MEM_DOWN_DIMM_SPD_DATA;" > > > 50 typedef struct { > 51 UINT8 DRAMDeviceType; // 2 DRAM Device Type > 52 UINT8 ModuleType; // 3 Module Type > 53 UINT8 SDRAMDensityAndBanks; // 4 SDRAM Density and Banks > 54 UINT8 SDRAMAddressing; // 5 SDRAM Addressing > 55 UINT8 VDD; // 6 Module Nominal Voltage > 56 UINT8 ModuleOrganization; // 7 Module Organization > 57 UINT8 ModuleMemoryBusWidth; > > 94 UINT8 DramManufacturerIdLsb; // 148 DRAM Manufacturer ID > Code, LSB > 95 UINT8 DramManufacturerIdMsb; // 149 DRAM Manufacturer ID > Code, MSB > 96 } MEM_DOWN_DIMM_SPD_DATA; > > > > So, I'm try to found **.c* source codes for check configuration point. > > But, coreboot are not setup the argument of sdram. > > I don't understand this sisution, Because sdram is must need a some > configuration for use. > > > *Why? do not setup the argument of sd* > > *ram ??? * > Please advise to me. > > Thank you. > > > > > -- > coreboot mailing list: [email protected] > https://www.coreboot.org/mailman/listinfo/coreboot >
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