Hi Jim. According to the Postcode it seems like you have no valid microcode for the used CPU. In src/drivers/intel/fsp1_0/cache_as_ram.inc is the code which ends up in the endless loop while this code is shown.
Check which CPU you really use on your mainboard and add the right microcode to you configuration. This should solve your issue. Werner Von: coreboot [mailto:[email protected]] Im Auftrag von ??? Gesendet: Freitag, 1. Juli 2016 05:46 An: [email protected] Betreff: [coreboot] Bring up Intel Camelback Mountain Board with coreboot+FSP failed Dear Sir, I just clone the latest coreboot source code from GIT<http://review.coreboot.org/p/coreboot> and FSP from Intel FSP website<https://downloadcenter.intel.com/download/25701>. Using " make crossgcc-i386 CPU=4 " to setup the compilation environment. But the Camelback Mountain board could not bring up successfully, it always hang with POST CODE = 0xCE. From the Intel FSP spec 1.0, it seems that system halt before loading FSP. Attached is my .config file, is there anyone hit the fail symptoms same as me and any idea to solve it? Thanks a lot, Jim
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