Hi everyone, I managed to get coreboot running. I was mentioning the PCI ID(marked in yellow below) wrong (my bad). I had to use 0x9856 but was using 0x9850(which is selected by default) but this information was kinda hard to find, I found it in the AMD dev website with login. Thanks to Idwer Vollering for pointing me in the right direction.
On Wed, Apr 26, 2017 at 12:06 AM, Haleigh Novak <[email protected]> wrote: > Yes, that is correct; I actually struggled with this sort of problem > for a while, > on my system the issue was that it would get past coreboot to stop within > SeaBIOS execution. > Does your system have usb ports? If it does, the usb enumeration happens > within coreboot, so a test might be to see what happens if you plug a usb > keyboard into the system before starting it. If the lights on the keyboard > blink after you start your machine then you are at least getting part way > into > coreboot. > > HN > > > From: Nagabhushan Shastry <[email protected]> > Sent: Tuesday, April 25, 2017 11:22 AM > To: Haleigh Novak; ron minnich > Cc: Idwer Vollering; coreboot > Subject: Re: [coreboot] Booting issue --AMD Olive Hill plus mainboard > > > Hi, > Thanks for the steps, I appreciate it. If I understand correctly I would > be able to use this tool when Linux boots with coreboot. > But the issue I have is, coreboot not coming up on the board rather I am > not sure if it's coming up because I don't see anything on the screen and > there is no serial port on the board(except the cpu fan running). Any > insight/suggestions would be appreciated. > > > On Tue, Apr 25, 2017, 10:53 PM Haleigh Novak <[email protected]> wrote: > > Hello , > > cbmem is a utility located in .../coreboot/util/cbmem. > You will have to fully boot into linux to use this coreboot utility. > You will also have to have the ability to re-flash your coreboot rom > because > there are some coreboot configuration changes. > > What I do to install and run is as follows: > > (Install) > 1) Mount your coreboot source folder to the running system you wish to > use the cbmem utility on. > 2) Navigate to .../coreboot/util/cbmem folder. > 3) Type "$ make install" into your terminal. > (cbmem should install on the system in the /usr/local/sbin folder.) > > (Use - coreboot setup; requires a re-flash of your coreboot rom.) > 1) In your coreboot folder run "$ make menuconfig". > 2) Under the console tab: (explanations are above the configuration line > and //[commented].) > //[Enable console output (below) by highlighting and typing 'y'.] > [*] Send console output to a CBMEM buffer > //[I had to increase the size for debugging (below).] > (0x40000) Room allocated for console output in CBMEM > //[Set the default level to SPEW (everything) if it is not set like that > already.] > Default console log level (8: SPEW) ---> > With those settings you should be able to successfully run the cbmem > utility > and get all the output you could need. If you wish to add debug statements > anywhere you can do that as well, though it will require a re-flash of your > coreboot rom again. All you need to do is add the following replacing <...> > as desired anywhere in the coreboot code and it will be displayed in the > cbmem output. > "printk(BIOS_INFO, "<statement> <variable print> <statement>.\n", > <variable>);" > > (Use - Run cbmem utility, you will need to be root for this.) > 1) "cbmem -c" -or- "/usr/local/sbin/cbmem -c" > > HN > > > From: coreboot <[email protected]> on behalf of Nagabhushan > Shastry <[email protected]> > Sent: Tuesday, April 25, 2017 9:41 AM > To: ron minnich > Cc: Idwer Vollering; coreboot > Subject: Re: [coreboot] Booting issue --AMD Olive Hill plus mainboard > > > > I included the microcode updates but no luck. > > > > The PCI IDs seem to be correct for Mullins [Radeon R3 Graphics] ( > http://pci-ids.ucw.cz/read/PC/1002). > There is no serial port in the Olive Hill Plus board. What are my options? > Also how do i use this tool in util/cbmem/ ? I am using the default > SeaBios as the payload. > > > > > On Tue, Apr 25, 2017 at 3:15 AM, ron minnich <[email protected]> wrote: > > unless you're dead certain you don't need them, include microcode updates. > did you hook up a serial port? > > > On Mon, Apr 24, 2017 at 2:44 PM Idwer Vollering <[email protected]> wrote: > 2017-04-24 21:08 GMT+02:00 Nagabhushan Shastry <[email protected] > >: > > Hi, > > > > I am trying to bring up the AMD G series Olive hill plus mainboard with > > coreboot. > > > > These are the options i have enabled in make menuconfig but I am not > able > > to see anything on the screen when i power on the board. > > Could someone please let me know if I am missing something. > > > > • General / Use CMOS for configuration values = enable (CMOS defaults are > > located in your boards directory src/mainboard/OEM/MODEL/cmos.default) > > • General / Include the coreboot .config file into the ROM image > > • General / Compress ramstage with LZMA > > • Mainboard / Mainboard vendor = AMD > > • Mainboard / Mainboard model = Olive Hill plus > > • Mainboard / ROM chip size = 8 MB > > • Chipset / Include CPU microcode in CBFS = Do not include microcode > updates > > (NOTE: you probably want to enable it on some systems) > > • Chipset / Enable Hudson XHCI Controller > > • Chipset / Add xhci firmware > > • (3rdparty/blobs/southbridge/amd/avalon/xhci.bin) XHCI firmware path > and > > filename > > (3rdparty/blobs/southbridge/amd/avalon/PSP/AmdPubKey.bin) AMD public > Key > > • Devices / Run VGA Option ROMs > > • Devices / Add a VGA BIOS image > > (3rdparty/blobs/northbridge/amd/00730F01/VBIOS.bin) VGA BIOS path and > > filename > > (1002,9850) VGA device PCI IDs > > These PCI IDs, are they correct? Is the VBIOS, which I don't know > anything about, executed? You need to have a way to see console > output, either using the board's serial port or - presuming the > mainboard boots to linux - through the utility found in util/cbmem/ > > > • Display / Keep VESA framebuffer = disable (disable for text-mode > graphics, > > enable for coreboot vesa framebuffer) > > • Generic Drivers / Serial port on SuperIO > > • Generic Drivers / Support Intel PCI-e WiFi adapters > > • Console / Squelch AP CPUs from early console. > > • Console / Serial port console output > > • Console / Use onboard VGA as primary video device > > • Console / Send console output to a CBMEM buffer > > • Console / Send POST codes to an external device > > • Console / Send POST codes to an IO port > > • System tables / [*] Generate an MP table > > • System tables / [*] Generate a PIRQ table > > • System tables / [*] Generate SMBIOS tables > > • Payload / SeaBIOS version (1.10.2) ---> > > • Payload / Use LZMA compression for payloads > > > > -- > > coreboot mailing list: [email protected] > > https://mail.coreboot.org/mailman/listinfo/coreboot > > -- > coreboot mailing list: [email protected] > https://mail.coreboot.org/mailman/listinfo/coreboot > -- > coreboot mailing list: [email protected] > https://mail.coreboot.org/mailman/listinfo/coreboot > > > -- > coreboot mailing list: [email protected] > https://mail.coreboot.org/mailman/listinfo/coreboot
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