Hi Cameron, > Did you modify the FSP blobs at all? Yes, we made some adjustments for our mainboard (mc_apl1). But they shouldn’t play a decisive role (power states, PCIe settings).
> The reason I ask is that my coreboot build hangs in the FspSiliconInit(). Then you will get pretty far. We are currently still using the MR2 FSP package for APL-I. As IFWI template we use the BIOS version v178.10 for the CRBs. These components are provided by Intel. That’s it. The CRB should boot with this combination. Mario > -----Ursprüngliche Nachricht----- > Von: Cameron Craig [mailto:[email protected]] > Gesendet: Freitag, 3. November 2017 11:51 > An: Scheithauer, Mario (DF MC MTS R&D SWRT 4); ahW@n > Cc: [email protected] > Betreff: RE: [coreboot] Problems changing payload on Intel Leaf Hill > > Hi Mario, > > I've been attempting to build coreboot(master) for the Leaf Hill CRB, with no > success so far. > > Did you modify the FSP blobs at all? > I had a look at your config, the filenames "FSP_MR2_M_ECC_MOD" caught my > eye. > > The reason I ask is that my coreboot build hangs in the FspSiliconInit(). > > Cheers, > Cameron > > > > Cameron Craig | Graduate Software Engineer | Exterity Limited > tel: +44 1383 828 250 | fax: | mobile: > e: [email protected] | w: www.exterity.com > > > > ____________________________________________________________________ > __ > This email has been scanned by the Symantec Email Security.cloud service. > For more information please visit http://www.symanteccloud.com > ____________________________________________________________________ > __ -- coreboot mailing list: [email protected] https://mail.coreboot.org/mailman/listinfo/coreboot
