> Le 27 févr. 2018 à 13:42, Sumo <[email protected]> a écrit : > > > When configuring CB with menuconfig you have to select your platform > > and type in the path to your ME-binary-blob. > > For the Harcuvar CRB there is no such configuration. > > This conf. is available to other mainboards (e.g. Intel "Little Plains" > mainboard: > menu "Chipset"->"Intel Firmware"->"Add Intel descriptor.bin file"->"Add Intel > ME/TXE firmware"->"Path to management engine firmware"). > > Maybe for the Harcuvar CRB the Intel ME FW is installed in the second > SPI flash, therefore there is no need to add the ME blob in the coreboot > build? I´m not sure about this, some board maintainer can confirm > this? No it’s in the same flash. Basically your first idea is what I am doing: > replace the BIOS region of the SPI flash (0x00800000–0x00ffffff) Or use intel fitc tool to build the final SPI image.
> > Do we have any documentation regarding the coreboot port for Harcuvar? Do you have access to intel support ? If yes there should be a document, but I’m not even sure it has been updated when the support was upstreamed. Hope this helps, Julien VdG > > Thanks, > Sumo > > 2018-02-26 19:42 GMT-03:00 Philipp Stanner <[email protected] > <mailto:[email protected]>>: > Am Montag, den 26.02.2018, 17:14 -0300 schrieb Sumo: > > Hi, > > > > In the coreboot build menu there is no option regarding the Intel ME > > integration. > > The 'coreboot.rom' file is the full SPI flash image or this file is > > suitable to > > replace the BIOS region of the SPI flash (0x00800000--0x00ffffff)? > > (i.e. in the SPI flash we already have a region for Intel ME > > firmware) > > I'm not sure what the question is. > > When configuring CB with menuconfig you have to select your platform > and type in the path to your ME-binary-blob. The later has to be > provided by you; meaning you have to extract the BIOS from the flash, > extract the ME-binary using coreboot/utils, clean it with ME-cleaner > (optional) and then build coreboot with your blob. > > The toolchain takes care automatically about the correct placement of > the ME in the right address-ranges. > > I hope this was helpful. > > > Thanks, > > Sumo > > -- > coreboot mailing list: [email protected] > https://mail.coreboot.org/mailman/listinfo/coreboot -- Julien Viard de Galbert - [email protected] Online / Scaleway Looking for an amazing job? Join us NOW ! https://careers.scaleway.com/
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