Hi, Dne 29.3.2018 v 20:39 taii...@gmx.com napsal(a): >> Plus make sure you enable "LFENCE is dispatch serializing" - perhaps >> coreboot can do that :) it is simple >> MSR write on fam 10h 12h+ the fam 11h and 0fh dont have this MSR but LFENCE >> is dispatch serilizing. > Hmm do you have more info links about this?
Yes sure, goto [1] click on [2] and check "MITIGATION G-2". Basically just set: MSR C001_1029[1]=1 on 10h/12h/14h/15h/16h/17h the 0fh and 11h don't have it but there is LFENCE dispatch serializing already. Thanks Rudolf [1] https://www.amd.com/en/corporate/security-updates [2] https://developer.amd.com/wp-content/resources/Managing-Speculation-on-AMD-Processors.pdf -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
