In addition to the previous info, I have found this code in sata.c, located at
src/southbridge/amd/sb700 :
/* Below is CIM InitSataLateFar */
if (sata_ahci_mode) {
/* Disable combined mode */
byte = pci_read_config8(sm_dev, 0xad);
byte &= ~(1 << 3);
pci_write_config8(sm_dev, 0xad, byte);
} else {
/* Enable interrupts from the HBA */
byte = read8(sata_bar5 + 0x4);
byte |= 1 << 1;
write8((sata_bar5 + 0x4), byte);
}
I'm wondering if my problem is related to not having any SATA drives installed?
(I just have a PCI-E SSD). It may be the case that the logic to disable
combined mode is not getting triggered in my scenario, yet it would do if there
was a SATA drive present.
‐‐‐‐‐‐‐ Original Message ‐‐‐‐‐‐‐
On Saturday, December 1, 2018 3:45 PM, petecb via coreboot
<[email protected]> wrote:
> No worries, please find it attached.
>
> This output looks a little more helpful as it contains the line:
> AMD-Vi: SP5100 erratum 28 detected, disabling IOMMU.
>
> I've discovered this thread that refers to it:
> https://mail.coreboot.org/pipermail/coreboot/2017-November/085440.html
>
> It appears to be an issue with combined sata mode being enabled.
> In this case the fix may be to make an amendment to the coreboot source code
> to disable combined sata mode and then rebuilding it and flashing it. If this
> is the best route, is there any guidance you can provide?
>
> However, I have just seen this post from you that indicates that this error
> doesn't crop up in Xen 4.10
> https://mail.coreboot.org/pipermail/coreboot/2017-November/085542.html
>
> Is it straightforward to configure an install of Qubes 4 with Xen 4.10?
>
> Kind regards,
>
> Pete
>
> Sent with ProtonMail Secure Email.
>
> ‐‐‐‐‐‐‐ Original Message ‐‐‐‐‐‐‐
> On Friday, November 30, 2018 10:09 PM, [email protected] [email protected] wrote:
>
> > Oops sorry forgot I also need "sudo xl dmesg" from dom0!
> >
> > coreboot mailing list: [email protected]
> > https://mail.coreboot.org/mailman/listinfo/coreboot
>
> --
>
> coreboot mailing list: [email protected]
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