On Sun, 8 Dec 2019 18:49:26 +0200
Kyösti Mälkki <[email protected]> wrote:
> Here is fam16kb asrock/imb-a180 with super-io init moved to bootblock:
> https://review.coreboot.org/c/coreboot/+/37453
Thanks.

I've tried to do the same for the E350M1 and I end up with:
> [...]/i386-elf-ld.bfd: build/bootblock/arch/x86/bootblock_crt0.o: in
>      function `enable_sse':
> [...]/src/arch/x86/bootblock_crt0.S:71: undefined reference to
>      `bootblock_pre_c_entry'

Only src/soc/amd/common/block/cpu/car/cache_as_ram.S seem to have it
for AMD CPUs/SOCs.

However that cache_as_ram.S is selected by SOC_AMD_COMMON_BLOCK_CAR,
which is only used in src/soc/amd/stoneyridge/Kconfig.

I don't understand why the other boards converted to switch away from
ROMCC_BOOTBLOCK don't have that issue.

Denis.



From 687f67f2645dbfae6af691a84ba5af6d672800d9 Mon Sep 17 00:00:00 2001
From: Denis 'GNUtoo' Carikli <[email protected]>
Date: Mon, 9 Dec 2019 00:40:31 +0100
Subject: [PATCH] asrock/e350m1: Switch away from ROMCC_BOOTBLOCK

Signed-off-by: Denis 'GNUtoo' Carikli <[email protected]>
---
 src/mainboard/asrock/e350m1/Kconfig                     | 1 -
 src/mainboard/asrock/e350m1/Makefile.inc                | 2 ++
 src/mainboard/asrock/e350m1/{romstage.c => bootblock.c} | 5 ++---
 3 files changed, 4 insertions(+), 4 deletions(-)
 rename src/mainboard/asrock/e350m1/{romstage.c => bootblock.c} (89%)

diff --git a/src/mainboard/asrock/e350m1/Kconfig b/src/mainboard/asrock/e350m1/Kconfig
index 86eaac8ba5..3bbc2a5150 100644
--- a/src/mainboard/asrock/e350m1/Kconfig
+++ b/src/mainboard/asrock/e350m1/Kconfig
@@ -17,7 +17,6 @@ if BOARD_ASROCK_E350M1
 
 config BOARD_SPECIFIC_OPTIONS
 	def_bool y
-	select ROMCC_BOOTBLOCK
 	select CPU_AMD_AGESA_FAMILY14
 	select NORTHBRIDGE_AMD_AGESA_FAMILY14
 	select SOUTHBRIDGE_AMD_CIMX_SB800
diff --git a/src/mainboard/asrock/e350m1/Makefile.inc b/src/mainboard/asrock/e350m1/Makefile.inc
index 440744c479..ffea060d80 100644
--- a/src/mainboard/asrock/e350m1/Makefile.inc
+++ b/src/mainboard/asrock/e350m1/Makefile.inc
@@ -13,6 +13,8 @@
 # GNU General Public License for more details.
 #
 
+bootblock-y += bootblock.c
+
 romstage-y += buildOpts.c
 romstage-y += BiosCallOuts.c
 romstage-y += OemCustomize.c
diff --git a/src/mainboard/asrock/e350m1/romstage.c b/src/mainboard/asrock/e350m1/bootblock.c
similarity index 89%
rename from src/mainboard/asrock/e350m1/romstage.c
rename to src/mainboard/asrock/e350m1/bootblock.c
index 292ecf2b35..ea6aac093a 100644
--- a/src/mainboard/asrock/e350m1/romstage.c
+++ b/src/mainboard/asrock/e350m1/bootblock.c
@@ -13,14 +13,13 @@
  * GNU General Public License for more details.
  */
 
-#include <northbridge/amd/agesa/state_machine.h>
+#include <bootblock_common.h>
 #include <superio/nuvoton/common/nuvoton.h>
 #include <superio/nuvoton/nct5572d/nct5572d.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, NCT5572D_SP1)
 
-
-void board_BeforeAgesa(struct sysinfo *cb)
+void bootblock_mainboard_early_init(void)
 {
 	nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 }
-- 
2.24.0

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