Dear Kyösti,
On 2020-01-25 00:56, Kyösti Mälkki wrote:
>>
>> System *boots* with one of:
>>
>> 1. maxcpus=0 (equivalent nosmp)
>> 2. maxcpus=1
>> 3. nolapic (with e1000 warning about missing MSI-X
>>
>> System does *not* boot with one of:
>>
>> 1. maxcpus=2
>> 2. noapic
Booting with `maxcpus=1` and then starting the second CPU also results
in a hang.
echo 1 | sudo tee /sys/devices/system/cpu/cpu0/online
> I thought SMP was generally not compatible with PIC IRQ routing (which
> noapic enforces?) and this would explain case 2.
>
> As for case 1, maybe I missed some detail with my commit [1] when
> switching from LAPIC to TSC timers. Like leaving LAPIC timers running
> at different rate or generally having the timer counters too much
> out-of-sync across CPU #0 and #1. You could try if that one is the
> commit with regression.
Yes, you are spot on.
Building the parent commit c00e2fb996
(cpu/intel: Use CPU_INTEL_COMMON_TIMEBASE) the system boots with both
CPUs.
Kind regards,
Paul
> [1] https://review.coreboot.org/c/coreboot/+/34200[2]:
> https://review.coreboot.org/c/coreboot/+/31342
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