Carlos, Again Hiroshi is correct. The hardware registers should be used to generate all ECCs, both for writing and reading. Note that these hardware ECCs are only valid when exactly 512 bytes are written or read.
Regards, Daniel Daniel J. Allred Software Applications Catalog DSP / End Emerging Equipment -----Original Message----- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Hiroshi Uchino Sent: Friday, October 06, 2006 3:18 AM To: Carlos Ojea Cc: [email protected] Subject: Re: Writing UBL and UBOOT in NAND Hi Carlos, DaVinci's hardware CRC algorithm is described in sprue20 2.5.6.6, but I think it's easier to use the hardware itself. 1. write NANDFCR.CS2ECC <- 1 2. read or write 512 byte 3. read NANDF1ECC & 0x0fff0fff Regards, Hiroshi _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
