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Hi,
We are doing the exact same thing and this was a fun “detour” for several hours
Basically, we modified the VPFE driver to allow an IOCTL to access our FPGA.
Look in the include/asm/arch folder – you will find IO.h (remember this comes from the include/asm/arch-davinci – so you may want to update them both before you clean+build a new kernel)
In the IO.h they have a few functions that do this physical-to-virtual memory mapping
We created a new function called
__MWR(x) that allows a virtual-to-physical mapping to a constants called DAVINCI_FLASH_VIRT. I forget where this is setup, but you will need to locate it. I think its in the davinci/board folder – grep for it.
The __MWR(x) allows us to talk to CS2 and directly access the flash memory of which we accidently put our FPGA right on top of.
However, the process should be the same for CS3. A catch here is (and grep for DAVINCI_FLASH_VIRT) that TI only punched out a 16K mapping for CS2. So I think you could extend that or create a new virtual mapping to access CS3
I attached IO.h for a reference
Here’s a question back to the forum:
If I have an imager scanning at resolution AxB and I want to display it at resolution PxM , how can this be done? Do we need that infamous resizer module that has no code yet:?
Thanks
Steve Spano, President Finger Lakes Engineering 15 West Main Street, Suite A P.O. Box 28 Dryden, Ny 13053 (V) 607-277-1614 x223 (C) 607-342-1150 www.FL-ENG.com - FLE's Main Website www.FLEDEVFORUM.com - FLE's Developer Forum -----Original Message-----
Hello All, I need an access to external hardware such as FPGA over EMIF. Has anybody an idea how and where should be EMIF configured?
Thanks |
io.h
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