Can anybody tell me at what rate the DSP clock is running on the DVEVM? I suspect it is running at 594MHz because
a) The part is spec'd to run at 594 MHz and TI would want to showcase that b) u-boot reports that the ARM is running at 297 MHz when it boots However a) u-boot could be just telling the world whatever it was told to tell the world b) the "all.tcf" file in the servers/all_codecs (in the codec engine distribution) says the clock rate is 567 MHz. But it could be lying. Is there a way (through /proc or /sys) that I could determine the setting of PLL1_PLLM from my Linux application? (There! I've successfully managed to pull this TI/DSP specific question into the realm of davinci-linux-open-source). --wpd _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
