Patrick, U-boot sets the clock frequency at 297MHz ARM, 594MHz DSP. Early boards clocked ARM, DSP, and DDR2 at a different rate and the tcf file likely has this incorrectly set with the legacy value (bug) - the side effect of setting the frequency incorrectly in the tcf file likely affects the time base of the BIOS timer tick but would not change the DSP clock.
Regards, Thom -----Original Message----- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Patrick Doyle Sent: Tuesday, October 09, 2007 1:18 PM To: davinci-linux-open-source Subject: DSP clock rate on DVEVM Can anybody tell me at what rate the DSP clock is running on the DVEVM? I suspect it is running at 594MHz because a) The part is spec'd to run at 594 MHz and TI would want to showcase that b) u-boot reports that the ARM is running at 297 MHz when it boots However a) u-boot could be just telling the world whatever it was told to tell the world b) the "all.tcf" file in the servers/all_codecs (in the codec engine distribution) says the clock rate is 567 MHz. But it could be lying. Is there a way (through /proc or /sys) that I could determine the setting of PLL1_PLLM from my Linux application? (There! I've successfully managed to pull this TI/DSP specific question into the realm of davinci-linux-open-source). --wpd _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
