[Cc'ing Sergey who has been here before and might know more...]
Troy Kisky wrote:
Not only are the ECC bytes stored in different locations in the spare area, but the ECC value stored is also different. (davinci-git vs U-boot) I've modified both the linux kernel, and u-boot to store the ecc at the end of the spare bytes. But I haven't pushed this anywhere. It's pretty trivial to make U-Boot use the same ECC algorithm as the davinci-git tree.
Maybe I don't understand it fully, but the current u-boot ECC implementation for large page NAND devices looks rather broken to me - it appears to generate a 12 byte ECC from the four NANDFnECC registers for a 2048 byte page read. But the NANDFnECC registers are for NAND chips on four different chip selects, not four 512-byte pages of one request. The data sheet says the ECC hardware will only work on 512-byte reads or writes.
As I see it, if using ECC on large page devices on a single chip select, you have to pray that the other ECC registers are always in the same state.
However, the MV kernel also does it this way, so maybe I'm missing something, or maybe they're both wrong?
The git kernel appears to do the right thing, using the same NANDF1ECC register four times.
Can show me how the current implementation in U-boot can work correctly at all? :)
Thanks, Bernard. _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
