Thomas Lange wrote:
Bernard Blackham wrote:
Maybe I don't understand it fully, but the current u-boot ECC
implementation for large page NAND devices looks rather broken to me -
it appears to generate a 12 byte ECC from the four NANDFnECC registers
for a 2048 byte page read. But the NANDFnECC registers are for NAND
chips on four different chip selects, not four 512-byte pages of one
request. The data sheet says the ECC hardware will only work on 512-byte
reads or writes.
You are 100% correct. The davinci u-boot implementation for 2048 byte
pages is broken.
Okay, thanks. I take it that means then that the MV kernel (at least at
patch level 45) is also broken as it uses essentially the same code.
I'm doing up a patch for u-boot with a config option to change the ECC
layout to match Linux davinci git for 2k-page devices. I'm still
struggling to see how the ECC layouts for 512-byte page devices compare
between u-boot and Linux - the order of the bytes and the inversion of
the bits to me says that even for 512-byte page devices, u-boot and git
can't share ECCs.
So my plan is to create a config option in u-boot (off by default for
backwards compatibility) to make ECCs match git. Turning this option on
will break compatibility with old u-boot and the MV kernel, but means
that ECC correction will actually work for large page NAND.
I just found that Troy has actually submitted a fix for this
previously[1], but it was amalgamated with other changes that led to it
being nacked. A bit of a shame, because it was good work!
Anyway, I hope to have a well tested patch tomorrow!
Cheers,
Bernard.
[1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/32017
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