Source: Texas Instruments Inc. Type: Enhancement Signed-off-by: Sudhakar Rajashekhara <[EMAIL PROTECTED]> Description: This patch adds the defines for the interrupt number assignments on DM6467. --- include/asm-arm/arch-davinci/irqs.h | 85 ++++++++++++++++++++++++++++++++++- 1 files changed, 84 insertions(+), 1 deletions(-)
diff --git a/include/asm-arm/arch-davinci/irqs.h b/include/asm-arm/arch-davinci/irqs.h index f4c5ca6..aacec1d 100644 --- a/include/asm-arm/arch-davinci/irqs.h +++ b/include/asm-arm/arch-davinci/irqs.h @@ -96,10 +96,93 @@ #define IRQ_EMUINT 63 #define DAVINCI_N_AINTC_IRQ 64 -#define DAVINCI_N_GPIO 71 +#define DAVINCI_N_GPIO 104 #define NR_IRQS (DAVINCI_N_AINTC_IRQ + DAVINCI_N_GPIO) +/* DaVinci DM644x-specific Interrupts */ +#define IRQ_DM644X_VDINT0 0 +#define IRQ_DM644X_VDINT1 1 +#define IRQ_DM644X_VDINT2 2 +#define IRQ_DM644X_HISTINT 3 +#define IRQ_DM644X_H3AINT 4 +#define IRQ_DM644X_PRVUINT 5 +#define IRQ_DM644X_RSZINT 6 +#define IRQ_DM644X_VENCINT 8 +#define IRQ_DM644X_VLCDINT 11 +#define IRQ_DM644X_EMACINT 13 +#define IRQ_DM644X_IDE 22 +#define IRQ_DM644X_SDIOINT 27 +#define IRQ_DM644X_VLQINT 31 +#define IRQ_DM644X_UARTINT2 42 +#define IRQ_DM644X_SPINT0 43 +#define IRQ_DM644X_SPINT1 44 +#define IRQ_DM644X_DSP2ARM0 46 +#define IRQ_DM644X_DSP2ARM1 47 +#define IRQ_DM644X_GPIO0 48 +#define IRQ_DM644X_GPIO1 49 +#define IRQ_DM644X_GPIO2 50 +#define IRQ_DM644X_GPIO3 51 +#define IRQ_DM644X_GPIO4 52 +#define IRQ_DM644X_GPIO5 53 +#define IRQ_DM644X_GPIO6 54 +#define IRQ_DM644X_GPIO7 55 +#define IRQ_DM644X_GPIOBNK0 56 +#define IRQ_DM644X_GPIOBNK1 57 +#define IRQ_DM644X_GPIOBNK2 58 +#define IRQ_DM644X_GPIOBNK3 59 +#define IRQ_DM644X_GPIOBNK4 60 + +/* DaVinci DM6467-specific Interrupts */ +#define IRQ_DM646X_VP_VERTINT0 0 +#define IRQ_DM646X_VP_VERTINT1 1 +#define IRQ_DM646X_VP_VERTINT2 2 +#define IRQ_DM646X_VP_VERTINT3 3 +#define IRQ_DM646X_VP_ERRINT 4 +#define IRQ_DM646X_RESERVED_1 5 +#define IRQ_DM646X_RESERVED_2 6 +#define IRQ_DM646X_WDINT 7 +#define IRQ_DM646X_CRGENINT0 8 +#define IRQ_DM646X_CRGENINT1 9 +#define IRQ_DM646X_TSIFINT0 10 +#define IRQ_DM646X_TSIFINT1 11 +#define IRQ_DM646X_VDCEINT 12 +#define IRQ_DM646X_USBINT 13 +#define IRQ_DM646X_USBDMAINT 14 +#define IRQ_DM646X_PCIINT 15 +#define IRQ_DM646X_TCERRINT2 20 +#define IRQ_DM646X_TCERRINT3 21 +#define IRQ_DM646X_IDE 22 +#define IRQ_DM646X_HPIINT 23 +#define IRQ_DM646X_EMACRXTHINT 24 +#define IRQ_DM646X_EMACRXINT 25 +#define IRQ_DM646X_EMACTXINT 26 +#define IRQ_DM646X_EMACMISCINT 27 +#define IRQ_DM646X_MCASP0TXINT 28 +#define IRQ_DM646X_MCASP0RXINT 29 +#define IRQ_DM646X_RESERVED_3 31 +#define IRQ_DM646X_MCASP1TXINT 32 +#define IRQ_DM646X_VLQINT 38 +#define IRQ_DM646X_UARTINT2 42 +#define IRQ_DM646X_SPINT0 43 +#define IRQ_DM646X_SPINT1 44 +#define IRQ_DM646X_DSP2ARMINT 45 +#define IRQ_DM646X_RESERVED_4 46 +#define IRQ_DM646X_PSCINT 47 +#define IRQ_DM646X_GPIO0 48 +#define IRQ_DM646X_GPIO1 49 +#define IRQ_DM646X_GPIO2 50 +#define IRQ_DM646X_GPIO3 51 +#define IRQ_DM646X_GPIO4 52 +#define IRQ_DM646X_GPIO5 53 +#define IRQ_DM646X_GPIO6 54 +#define IRQ_DM646X_GPIO7 55 +#define IRQ_DM646X_GPIOBNK0 56 +#define IRQ_DM646X_GPIOBNK1 57 +#define IRQ_DM646X_GPIOBNK2 58 +#define IRQ_DM646X_DDRINT 59 +#define IRQ_DM646X_AEMIFINT 60 + #define ARCH_TIMER_IRQ IRQ_TINT1_TINT34 #endif /* __ASM_ARCH_IRQS_H */ -- 1.5.4.1 _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
