Hi Tim Master Mode: Only an SPI master can initiate an operation between master and slave. In master mode, configure the SPI core using the control and slaveselect registers,and then write data to the txdata buffer to initiate a transaction. A master peripheral can monitor the status of the transaction by reading the status register. A master peripheral can enable interrupts to notify the host whenever new data is received (for example, a transfer has completed), or whenever the transmit buffer is ready for new data.
The SPI protocol is full duplex, so every transaction both sends and receives data at the same time. The master transmits a new data bit on the mosi output and the slave drives a new data bit on the miso input for each active edge of sclk. The SPI core divides the Avalon-MM system clock using a clock divider to generate the sclk signal The master transmits a new data bit on the mosi output and the slave drives a new data bit on the miso input for each active edge of sclk. Slave Mode: In slave mode, the SPI core simply waits for the master to initiate transactions. Before a transaction begins, the slave logic is continuously polling the ss(Slave Select) input. When the master asserts ss(Slave Select) (drives it low), the slave logic immediately begins sending the transmit shift register contents to the miso output. The slave logic also captures data on the mosi input, and fills the receive shift register simultaneously. Thus, a read and write transaction are carried out simultaneously. The host processor writes data to the txdata registers, so that it will be transmitted the next time the master initiates an operation. A master peripheral reads received data from the rxdata register. A master peripheral can enable interrupts to notify the host whenever new data is received, or whenever the transmit buffer is ready for new data. Hope this will help you, Regards, Suresh S -----Original Message----- From: Xu, Li (GE, Research) [mailto:[EMAIL PROTECTED] Sent: Wednesday, October 15, 2008 1:39 PM To: [EMAIL PROTECTED] Subject: RE: DaVinci SPI read and write Hi Suresh, Thanks for the link, I believe this can help me a lot. The question here is in order to read data from SPI interface the device should initiate a write operation then perform the read operation, is that correct? Regards Tim ---------------------------------------------------------------------------- -- From: sureshs [mailto:[EMAIL PROTECTED] Sent: Wednesday, October 15, 2008 3:48 PM To: Xu, Li (GE, Research); [email protected] Subject: RE: DaVinci SPI read and write Hi Tim, I have worked on similar situation but the SPI interface is between two DM6467 platform. one DM6467 will be working as Master and another DM6467 as Slave. The below link may help you to resolve your problem. http://linux.omap.com/pipermail/davinci-linux-open-source/2007-December/00 4836.html Regards, Suresh S -----Original Message----- From: [EMAIL PROTECTED] om [mailto:[EMAIL PROTECTED] ncidsp.com]On Behalf Of Xu, Li (GE, Research) Sent: Wednesday, October 15, 2008 12:08 PM To: [email protected] Cc: Xu, Li (GE, Research) Subject: DaVinci SPI read and write Dear DaVinci Folks, I recently working on SPI interface in DM6446 and DM6467 platform. DM6446 is configured as master, whereas DM6467 as slave, both working in interrupt mode. I can see clock and data signal via oscilloscope when DM6446 sending data via SPI interface, but I am not able to receive any data at DM6467 side. However, the interrupt service routine in DM6467 side is activated when DM6446 sending data, but SPI Flag Status Register (SPIFLG) does not indicate any valid interrupt has occured, the value of this register is 0x800000, according to data sheet, 31-10 bit of this register is reserved, reads should return zero. I was very confused about what I get right now. Does anyone have similar situation as me? Your response will be highly appreciated. For your information, the SPI driver I am using contains below files: spi-core.c spi_davinci.c spi_davinci_client.c spi_davinci_lb_test.c spi-dev.c Regards Tim The information contained in this electronic message and any attachments to this message are intended for the exclusive use of the addressee(s) and may contain proprietary, confidential or privileged information. If you are not the intended recipient, you should not disseminate, distribute or copy this e-mail. Please notify the sender immediately and destroy all copies of this message and any attachments contained in it.
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