Hi,
First let me tell you that you walking toward a lot of pain :)
The kernel resides on RAM, but the problem is your root fs is likely
living on 2kpg NAND (if you don't use something like initrd), so
unless you exclude your 2kpg NAND from the kernel visibility, you
can't assume it won't touch the 2kpg NAND. If a full in-RAM solution
doesn't work for your requirements (i.e using initrd), then you will
have to implement a single function to select the NAND chip through
the GPIO using a semaphore, which will be pretty trivial for the NAND
API as you can insert this on the same function that selects between
the different NAND dies on the multi-die parts. The problem will be
that you will have to gain the GPIO in kernel space to let your app
read/write directly to the 4kpg NAND, so you likely have to implement
an MTD driver for it if you want to make your life less painful.
Regards,
Diego Dompe
RidgeRun Engineering
On Nov 18, 2008, at 6:56 AM, Vijay Soni wrote:
We are going to use DM355 hardware similar to EVM board with an
extra 4K page size NandFlash besides the usual 2K page NandFlash
device on it. There will be an extra GPIO output from DM355 to
select one of the two. The 2K pg NF is used through the kernel just
as in EVM but the 4K pg NandFlash will be used directly by
application software, not through kernel, without using any
filesystem, just doing page rd/wr operations directly.
I have a doubt that this may not work as the kernel may be operating
with 2K pg NF at the same time app is operating with 4K pg NF which
will result in clash as only one chip enable can be active at a
time. However this may work if kernel does not do any NF operation
once it has booted and application inited. Can someone confirm this?
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