Hello.
Mark A. Greer wrote:
The base address for the DMA's Third Party Channel Controller is currently
hardcoded. Instead, use the base address that is already in the resource
data for the controller.
Signed-off-by: Mark A. Greer <[email protected]>
This patch has a mistake...
diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/mach-davinci/dma.c
index a7acd4c..ca416c1 100644
--- a/arch/arm/mach-davinci/dma.c
+++ b/arch/arm/mach-davinci/dma.c
@@ -102,9 +102,6 @@
#define PARM_OFFSET(param_no) (EDMA_PARM + ((param_no) << 5))
-#define edmacc_regs_base IO_ADDRESS(DAVINCI_DMA_3PCC_BASE)
-
-
#define EDMA_MAX_DMACH 64
#define EDMA_MAX_PARAMENTRY 512
#define EDMA_MAX_EVQUE 2 /* FIXME too small */
@@ -112,6 +109,8 @@
/*****************************************************************************/
+static __iomem void *edmacc_regs_base;
+
static inline unsigned int edma_read(int offset)
{
return (unsigned int)__raw_readl(edmacc_regs_base + offset);
@@ -997,10 +996,21 @@ static int __init edma_probe(struct platform_device *pdev)
int status;
const s8 *noevent;
int irq = 0, err_irq = 0;
+ struct resource *r;
if (!info)
return -ENODEV;
+ r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "edma_cc");
+ if (!r)
+ return -ENODEV;
+
+ r = request_mem_region(r->start, r->end + 1, r->name);
Maybe you meant r->end - r->start + 1?
+ if (!r)
+ return -EBUSY;
+
+ edmacc_regs_base = IO_ADDRESS(r->start);
+
num_channels = min_t(unsigned, info->n_channel, EDMA_MAX_DMACH);
num_slots = min_t(unsigned, info->n_slot, EDMA_MAX_PARAMENTRY);
@@ -1079,6 +1089,7 @@ fail:
free_irq(err_irq, NULL);
if (irq)
free_irq(irq, NULL);
+ release_mem_region(r->start, r->end + 1);
Same here...
WBR, Sergei
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