David,
Thanks for your reply.
In SPRUE25-GPIO.pdf, Table.2 of Page13. The arm side gpio interrupt base
shoule be 48.
For example, IRQ_GPIO6 is defined as 54 in "irqs.h" but the result of
gpio_to_irq(6) is "64+6". I think they should be same.
ÔÚÄúµÄÀ´ÐÅÖÐÔø¾Ìáµ½:
>From: David Brownell <[email protected]>
>Reply-To:
>To: [email protected]
>Subject: Re: Questions about gpio_to_irq..
>Date:Tue, 21 Apr 2009 20:51:06 -0700
>
>On Tuesday 21 April 2009, [email protected] wrote:
> > In Mv linux kernel, gpio_to_irq funxtions is defined as below:
> > static inline int gpio_to_irq(unsigned gpio)
> > {
> > return DAVINCI_N_AINTC_IRQ + gpio;
> > }
> >
> > But DAVINCI_N_AINTC_IRQ is defined as "64" which is the
> > dsp side irq start number, and I think it should be "48"
> > with the arm side.
>
> In SPRUE14B when it describes AINTC, in 9.1, I read:
>
> Supports up to 64 interrupt channels (16 external channels)
>
> Then table 9-1 shows lots of IRQs ... including several
> rather significant ones with numbers more than 48.
>
>
> Where ever did "48" come from??
>
>
> > Is this a bug?
>
> Evidently not.
>
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