David,
Thanks for your reply..
Then should you mean gpio_to_irq(10) == IRQ_GPIOBNK0 ??
Actually, if I request_irq(gpio_to_irq(10)...) will failed because the irq
number is much bigger than arm interrupt max number--64.
ÔÚÄúµÄÀ´ÐÅÖÐÔø¾Ìáµ½:
>From: David Brownell <[email protected]>
>Reply-To:
>To: [email protected]
>Subject: Re: Questions about gpio_to_irq..
>Date:Tue, 21 Apr 2009 20:51:06 -0700
On Tuesday 21 April 2009, Wei Jiang wrote:
> In SPRUE25-GPIO.pdf Page13, the arm side gpio interrupt should begin at 48.
Not really ... those are only for eight of the GPIO interrupts;
you can't use them for GPIO #10, for example.
If you request_irq(gpio_to_irq(6), ...) it goes through the
GPIO bank interrupt mechanism and gets dispatched that way.
> For example, IRQ_GPIO6 defined in arch/irqs.h is 54 and should be same
> as gpio_to_irq(6). Actually, if I wrote this:
> set_irq_type(IRQ_GPIO6,...);
> have no effect to GPIO6.
There are a few different issues there.
First, that the only behavior *guaranteed* to work portably
is to use request_irq(gpio_to_irq(N), ...). That works OK
on DaVinci, though there's some question about whether there
may be a load-dependent issue that shows up with dm9000 on
the dm355evm.
Second, that while DaVinci has two *hardware* mechanisms
for dispatching GPIO{0..7} IRQs -- "direct" and "banked"
dispatch through AINTC, as shown on the page you reference
above -- I don't know that anyone has observed the "direct"
one working in Linux. One theory is that enabling Bank 0
disables the direct handling of the first set of IRQs.
(Nobody has yet bothered to sort this out.)
Third, that interrupts going through AINTC don't support
set_irq_type() at all. That's fundamentally a hardware
restriction, and is a reason to use the GPIO bank IRQ
mechanism ... which can trigger on either or both edges,
depending on what the device hooked up to that GPIO needs.
- Dave
>
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