"Karicheri, Muralidharan" <[email protected]> writes:

> Could you give a small tutorial on how to use the clock API?

Looks like you have the basics right.

First question.  Does your driver work with
CONFIG_DAVINCI_RESET_CLOCKS=n.  I'll assume yes. 

> I have hard time getting it to work. I did the following....
>
> dm355.c
>
> static struct clk vpfe_capture_clk = {
>       .name = "vpfe-capture", // not sure if this can be any name
>       .parent = &vpss_master_clk, // cause vpfe capture requires vpss clock
> };
>
>
> ....
> CLK("vpfe-capture.0", "vpfe-capture", &vpfe_capture_clk),
> CLK(NULL, NULL, NULL),
> };

For starters, you can leave dm355.c alone and not create new clocks.
Just get/enable the vpss clock(s) that are already there.

>From what I can glean from a quick read of the docs, the VPFE does not
have a clock independent of the VPSS.
>
> in my driver I call,
>
> struct clk *vpfe_clk;
> vpfe_clk = clk_get(&pdev->dev, "vpfe-capture")

Did you check the return value of this?

> clk_enable(vpfe_clk);

or this?

> To clean up
> clk_disable(vpfe_clk);
> clk_put(vpfe_clk);
>
> But this enables VPSS clock. But registers are still not writeable.

Hmm, the disable/put enables the VPSS clock?  I'm a bit confused
by your summary.

In any case, how are you sure the VPSS clock is getting enabled.

I am not terribly familiar with the VPFE internals, but IIUC there are
several clocks required for this to work.  Are there other clocks
besides the vpss_master that are needed for this module to work?

Kevin

>>-----Original Message-----
>>From: Kevin Hilman [mailto:[email protected]]
>>Sent: Thursday, May 14, 2009 1:22 PM
>>To: Karicheri, Muralidharan
>>Cc: [email protected]
>>Subject: Re: DM355 - No vpss register write happens in the latest kernel
>>
>>"Karicheri, Muralidharan" <[email protected]> writes:
>>
>>> I have now added clk_enable(), clk_disable to my driver. But I see
>>> the following logs randomly when the board is powered.
>>
>>randomly?  The disabled clocks will be dumped on every boot.
>>
>>> I have CONFIG_DAVINCI_RESET_CLOCKS-y set. So this should get
>>> displayed always, right ?
>>
>>Yes.  Since I don't see VPSS clock being disabled, you must
>>be either getting/enabling the clocks very early in boot, or
>>building your driver into the kernel and getting the clocks
>>in the probe method.
>>
>>I suggest you also test by building your driver as a module
>>and loading it after the kernel boots.  This will test that
>>the kernel can disable the clocks during boot, but your driver
>>can re-enable them later.
>>
>>Kevin
>>
>>> Clocks: disable unused uart1
>>> Clocks: disable unused uart2
>>> Clocks: disable unused ide
>>> Clocks: disable unused asp0
>>> Clocks: disable unused mmcsd
>>> Clocks: disable unused spi
>>> Clocks: disable unused usb
>>> Clocks: disable unused vlynq
>>> Clocks: disable unused pwm0
>>> Clocks: disable unused pwm1
>>> Clocks: disable unused pwm2
>>> Clocks: disable unused timer1
>>>
>>> Murali Karicheri
>>> Software Design Engineer
>>> Texas Instruments Inc.
>>> Germantown, MD 20874
>>> Phone : 301-515-3736
>>> email: [email protected]
>>>
>>>>-----Original Message-----
>>>>From: Kevin Hilman [mailto:[email protected]]
>>>>Sent: Wednesday, May 13, 2009 6:17 PM
>>>>To: Karicheri, Muralidharan
>>>>Cc: [email protected]
>>>>Subject: Re: DM355 - No vpss register write happens in the latest kernel
>>>>
>>>>"Karicheri, Muralidharan" <[email protected]> writes:
>>>>
>>>>> We had figured that was the issue with the clock being disabled.
>>>>>
>>>>> I see vpss master, vpss slave and vpss dac clocks defined. Now vpss
>>>>> clock is required for all the vpss modules (capture, display, h3a
>>>>> etc). In VPSS we have registers for enabling clocks for each module,
>>>>> but the above clock is applicable for more than one driver. How does
>>>>> driver request clock in this case?
>>>>
>>>>Each driver that uses the clock should do a clk_get() and
>>>>clk_enable().  The clock framework will track the usecounts and
>>>>disable the hw clock when the usecount goes to zero, then re-enable
>>>>the clock on the next clk_enable().
>>>>
>>>>> I believe this should be enabled from the evm board setup. Right now
>>>>> I have set the flag to ALWAYS_ENABLED. Hope this is fine.
>>>>
>>>>No.
>>>>
>>>>You enable the clock by calling clk_get()/clk_enable().
>>>>
>>>>Kevin
>>>>
>>>>> Murali Karicheri
>>>>> Software Design Engineer
>>>>> Texas Instruments Inc.
>>>>> Germantown, MD 20874
>>>>> Phone : 301-515-3736
>>>>> email: [email protected]
>>>>>
>>>>>>-----Original Message-----
>>>>>>From: Kevin Hilman [mailto:[email protected]]
>>>>>>Sent: Wednesday, May 13, 2009 5:35 PM
>>>>>>To: Karicheri, Muralidharan
>>>>>>Cc: [email protected]
>>>>>>Subject: Re: DM355 - No vpss register write happens in the latest
>>kernel
>>>>>>
>>>>>>"Karicheri, Muralidharan" <[email protected]> writes:
>>>>>>
>>>>>>
>>>>>>> I have ported the video driver to the latest davinci git kernel and
>>>>>>> I have built a single uImage for DM355 and DM6446. The driver works
>>>>>>> fine on DM6446, but doesn't work on DM355. When I dumped the
>>>>>>> registers, none of them were being written. I tried writing manually
>>>>>>> using writel application and still I can't see the values in the
>>>>>>> registers. The architecture code has changed recently quite a lot. I
>>>>>>> have a version of the kernel that downloaded in March and this issue
>>>>>>> was not seen there. This is blocking my driver work and any help
>>>>>>> will be appreciated.
>>>>>>
>>>>>>My first guess would be that your driver doesn't enable all the
>>>>>>relevant clocks for VPSS?
>>>>>>
>>>>>>You could try without the CONFIG_DAVINCI_RESET_CLOCKS=y in
>>>>>>the config.
>>>>>>
>>>>>>If it works with that option disabled, then your driver has a bug in
>>>>>>that it is not properly requesting clocks.
>>>>>>
>>>>>>Kevin
>>>>>>

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