On Tue, Aug 11, 2009 at 04:31:38, Kevin Hilman wrote:
> Sekhar Nori <[email protected]> writes:
>
>
[...]
> > +static int da850_set_armrate(struct clk *clk, unsigned long rate)
> > +{
> > +
[...]
> > + /* Propogate new rate */
> > + pllclk->rate = pllclk->parent->rate;
> > + pllclk->rate /= prediv;
> > + pllclk->rate *= mult;
> > + pllclk->rate /= postdiv;
> > +
> > + /* FIXME: unnecessarily re-calculates rates for PLL1 as well */
> > + davinci_clk_recalc_rates(da850_clks);
>
>
> Hmm, possible update for PATCH 1/3, I'll hold off on pushing 1/3 until
> I hear back.
>
> maybe have another flag in the PLL which says that one of the child
> clocks has been changed. Any calls to clk_set_rate() or set_pllrate()
> will set that flag in the PLL. If that flag is not set, then
> recalc_rates() can check if that flag is set and only recalc rates as
> necessary.
>
Kevin,
I implemented this little differently as I thought getting
to PLL data for each clock for checking the 'rate changed'
flag will incur high runtime overhead during frequency
transitions.
So, I shifted that computation to init time and now maintain
another list of clocks whose rates need to be re-computed
when PLL0 rate changes.
Thanks,
Sekhar
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