Andrey Porodko <[email protected]> writes:

> The Neuros OSD 2.0 is the hardware component of the Neuros Open
> Internet Television Platform. Hardware is very close to Ti DM644X-EVM board.
> It has: DM6446M02 module with 256MB NAND, 256MB RAM, TLV320AIC32 AIC,
> USB, Ethernet, SD/MMC, UART, THS8200, TVP7000 for video.
> Additionaly realtime clock, IR remote control receiver,
> IR Blaster based on MSP430 (firmware although is different
> from used in DM644X-EVM), internal ATA-6 3.5” HDD drive
> with PATA interface, two muxed red-green leds.
>
> For more information please refer to
>       http://wiki.neurostechnology.com/index.php/OSD_2.0_HD
>
> Signed-off-by: Andrey Porodko <[email protected]>

Mostly there... 

[...]

> +     davinci_setup_usb(1000, 8);
> +     /* Mux the pins to be GPIOS, VLYNQEN is already done at startup */
> +     /* The AEAWx. are five new AEAW pins than can be muxed by separate.

...can be muxed separately.

> +      * When set to 0, those pins can be used for GPIOs. For our board,
> +      * we need gpio(10,11,12,13) to support the leds we have connected
> +      * on those pins.
> +      */

As pointed out already, please use the accepted multi-line coding style.
Search for 'multi-line' in Documentation/CodingStyle.

> +     davinci_cfg_reg(DM644X_AEAW0);
> +     davinci_cfg_reg(DM644X_AEAW1);
> +     davinci_cfg_reg(DM644X_AEAW2);
> +     davinci_cfg_reg(DM644X_AEAW3);
> +     davinci_cfg_reg(DM644X_AEAW4);

Aldo, the comment mentions 4 pins being used as GPIOs and you're
configuring 5 pins here.  Please update the comments to explain what
is being done and why.

Thanks,

Kevin

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