Hi,

Here's cleaned up patch against pkg-chromium git. I've now briefly tested the
built chromium runs on armhf hw and a bit more extensively on arm64 hw.

Michael, how would you feel about sending at test build at experimental? 

Riku

>From 10a49f52d08b576e82613a90de4a7ec1e036f387 Mon Sep 17 00:00:00 2001
From: Riku Voipio <riku.voi...@linaro.org>
Date: Wed, 21 Oct 2015 15:50:07 +0300
Subject: [PATCH] armhf and arm64 support

Add support for building chromium on armhf and arm64
---
 debian/control                              |   7 +-
 debian/patches/aarch64-fixes.patch          |  42 +++++
 debian/patches/aarch64_openmax_clang.patch  | 273 ++++++++++++++++++++++++++++
 debian/patches/series                       |   3 +
 debian/patches/silence-clang-warnings.patch |  15 ++
 debian/rules                                |  22 +++
 debian/scripts/chromium                     |  26 ++-
 7 files changed, 380 insertions(+), 8 deletions(-)
 create mode 100644 debian/patches/aarch64-fixes.patch
 create mode 100644 debian/patches/aarch64_openmax_clang.patch
 create mode 100644 debian/patches/silence-clang-warnings.patch

diff --git a/debian/control b/debian/control
index 5172532..b21442e 100644
--- a/debian/control
+++ b/debian/control
@@ -81,10 +81,11 @@ Build-Depends:
  libgcrypt20-dev,
  fonts-ipafont-gothic,
  fonts-ipafont-mincho,
+ binutils (>= 2.25.1-7.1) [armhf],
 Standards-Version: 3.9.6
 
 Package: chromium
-Architecture: i386 amd64
+Architecture: i386 amd64 armhf arm64
 Built-Using: ${Built-Using}
 Depends:
  ${misc:Depends},
@@ -105,7 +106,7 @@ Description: web browser
  This package contains the web browser component.
 
 Package: chromium-dbg
-Architecture: i386 amd64
+Architecture: i386 amd64 armhf arm64
 Section: debug
 Priority: extra
 Built-Using: ${Built-Using}
@@ -134,7 +135,7 @@ Description: web browser - language packs
  ro, ru, sk, sl, sr, sv, sw, ta, te, th, tr, uk, vi, zh-CN, zh-TW
 
 Package: chromedriver
-Architecture: i386 amd64
+Architecture: i386 amd64 armhf arm64
 Depends:
  ${misc:Depends},
  ${shlibs:Depends},
diff --git a/debian/patches/aarch64-fixes.patch b/debian/patches/aarch64-fixes.patch
new file mode 100644
index 0000000..cac330a
--- /dev/null
+++ b/debian/patches/aarch64-fixes.patch
@@ -0,0 +1,42 @@
+Index: chromium-browser-46.0.2490.13/content/common/sandbox_linux/bpf_gpu_policy_linux.cc
+===================================================================
+--- chromium-browser-46.0.2490.13.orig/content/common/sandbox_linux/bpf_gpu_policy_linux.cc
++++ chromium-browser-46.0.2490.13/content/common/sandbox_linux/bpf_gpu_policy_linux.cc
+@@ -194,8 +194,11 @@ ResultExpr GpuBrokerProcessPolicy::Evalu
+ #if !defined(OS_CHROMEOS)
+     // The broker process needs to able to unlink the temporary
+     // files that it may create. This is used by DRI3.
++#if !defined(__aarch64__)
+     case __NR_unlink:
+-#endif
++#endif // !defined(__aarch64__)
++    case __NR_unlinkat:
++#endif // !defined(OS_CHROMEOS)
+       return Allow();
+     default:
+       return GpuProcessPolicy::EvaluateSyscall(sysno);
+Index: chromium-browser-46.0.2490.13/third_party/ffmpeg/ffmpeg.gyp
+===================================================================
+--- chromium-browser-46.0.2490.13.orig/third_party/ffmpeg/ffmpeg.gyp
++++ chromium-browser-46.0.2490.13/third_party/ffmpeg/ffmpeg.gyp
+@@ -267,7 +267,7 @@
+                 '-fno-omit-frame-pointer',
+               ],
+             }],  # target_arch == "ia32"
+-            ['target_arch == "arm"', {
++            ['target_arch == "arm" or target_arch =="arm64" ', {
+               # On arm we use gcc to compile the assembly.
+               'sources': [
+                 '<@(asm_sources)',
+Index: chromium-browser-46.0.2490.13/third_party/boringssl/boringssl.gyp
+===================================================================
+--- chromium-browser-46.0.2490.13.orig/third_party/boringssl/boringssl.gyp
++++ chromium-browser-46.0.2490.13/third_party/boringssl/boringssl.gyp
+@@ -40,6 +40,7 @@
+           'conditions': [
+             ['OS == "linux" or OS == "android"', {
+               'sources': [ '<@(boringssl_linux_aarch64_sources)' ],
++              'cflags': [ '-march=armv8-a+crypto', ],
+             }, {
+               'defines': [ 'OPENSSL_NO_ASM' ],
+             }],
diff --git a/debian/patches/aarch64_openmax_clang.patch b/debian/patches/aarch64_openmax_clang.patch
new file mode 100644
index 0000000..82ac45d
--- /dev/null
+++ b/debian/patches/aarch64_openmax_clang.patch
@@ -0,0 +1,273 @@
+From 7f322e1714aca3d77f826a313bbbe106950ad67e Mon Sep 17 00:00:00 2001
+From: Riku Voipio <riku.voi...@linaro.org>
+Date: Fri, 16 Oct 2015 16:29:58 +0300
+Subject: [PATCH] arm64: use correct syntax for FMUL
+
+While the current syntax is accepted by gcc, clang refuses it. According
+to ARM ARM, it seems gcc is a bit too flexible, and clang is correct to
+refuse it.
+---
+ third_party/openmax_dl/dl/sp/src/arm/arm64/ComplexToRealFixup.S           |  2 +-
+ .../armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_s.S   |  2 +-
+ third_party/openmax_dl/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix2_s.S | 17 ++++----
+ third_party/openmax_dl/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix4_s.S | 51 ++++++++++++----------
+ .../arm/arm64/armSP_FFT_CToC_FC32_Radix8_fs_s.S    | 16 +++----
+ 5 files changed, 46 insertions(+), 42 deletions(-)
+
+Index: chromium-browser-46.0.2490.13/third_party/openmax_dl/dl/sp/src/arm/arm64/ComplexToRealFixup.S
+===================================================================
+--- chromium-browser-46.0.2490.13.orig/third_party/openmax_dl/dl/sp/src/arm/arm64/ComplexToRealFixup.S
++++ chromium-browser-46.0.2490.13/third_party/openmax_dl/dl/sp/src/arm/arm64/ComplexToRealFixup.S
+@@ -93,7 +93,7 @@
+ #define qT2       v18.2s
+ #define qT3       v20.2s
+ 
+-#define half      v0.2s
++#define half      v0.s
+ #define dZip      v21.2s
+ #define dZip8b    v21.8b
+         
+@@ -106,7 +106,7 @@
+ 
+         clz     order, subFFTNum                    // N = 2^order
+ 
+-        RSB     order,order,#63
++        rsb     order,order,#63
+         MOV     subFFTSize,subFFTNum            // subFFTSize = N/2
+         //MOV     subFFTNum,N
+         mov     argDst, pDst
+@@ -127,7 +127,7 @@
+         MOV     zero,#0
+         mov    dX0rs[1],zero
+         lsl     step,subFFTSize, #3               // step = N/2 * 8 bytes
+-        mov    dX0i[1],zero
++        mov    dX0is[1],zero
+         // twStep = 3N/8 * 8 bytes pointing to W^1
+         SUB     twStep,step,subFFTSize,LSL #1
+ 
+@@ -154,7 +154,7 @@
+         // Process 4 elements at a time. E.g: F(1),F(2) and F(N/2-2),F(N/2-1)
+         // since both of them require Z(1),Z(2) and Z(N/2-2),Z(N/2-1)
+ 
+-        fmov     half, #0.5
++        fmov     v0.2s, #0.5
+ 
+ evenOddButterflyLoop:
+ 
+Index: chromium-browser-46.0.2490.13/third_party/openmax_dl/dl/sp/src/arm/arm64/armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_s.S
+===================================================================
+--- chromium-browser-46.0.2490.13.orig/third_party/openmax_dl/dl/sp/src/arm/arm64/armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_s.S
++++ chromium-browser-46.0.2490.13/third_party/openmax_dl/dl/sp/src/arm/arm64/armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_s.S
+@@ -111,11 +111,11 @@
+ 
+ #define dZip    v19.2s
+ #define dZip8b  v19.8b
+-#define half    v13.2s
++#define half    v13.s
+ 
+         .macro FFTSTAGE scaled, inverse, name
+ 
+-        fmov    half, 0.5
++        fmov    v13.2s, 0.5
+ 
+         asr     size, subFFTNum, #1           // preserve the contents of N = subFFTNum
+         lsl     step, subFFTNum, #2           // step = N/2 * 8 bytes
+Index: chromium-browser-46.0.2490.13/third_party/openmax_dl/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix2_s.S
+===================================================================
+--- chromium-browser-46.0.2490.13.orig/third_party/openmax_dl/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix2_s.S
++++ chromium-browser-46.0.2490.13/third_party/openmax_dl/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix2_s.S
+@@ -70,6 +70,7 @@
+ // Neon Registers
+ 
+ #define dW      v0.2s
++#define dWs     v0.s
+ #define dX0     v2.2s
+ #define dX1     v3.2s
+ #define dX2     v4.2s
+@@ -135,17 +136,17 @@ radix2SetLoop\name :
+         SUBS    setCount,setCount,#2
+ 
+         .ifeqs  "\inverse", "TRUE"
+-            fmul   qT0,dX2,dW[0]
+-            fmla   qT0,dX3,dW[1]                       // real part
+-            fmul   qT1,dX3,dW[0]
+-            fmls   qT1,dX2,dW[1]                       // imag part
++            fmul   qT0,dX2,dWs[0]
++            fmla   qT0,dX3,dWs[1]                       // real part
++            fmul   qT1,dX3,dWs[0]
++            fmls   qT1,dX2,dWs[1]                       // imag part
+ 
+         .else
+ 
+-            fmul   qT0,dX2,dW[0]
+-            fmls   qT0,dX3,dW[1]                       // real part
+-            fmul   qT1,dX3,dW[0]
+-            fmla   qT1,dX2,dW[1]                       // imag part
++            fmul   qT0,dX2,dWs[0]
++            fmls   qT0,dX3,dWs[1]                       // real part
++            fmul   qT1,dX3,dWs[0]
++            fmla   qT1,dX2,dWs[1]                       // imag part
+ 
+         .endif
+ 
+Index: chromium-browser-46.0.2490.13/third_party/openmax_dl/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix4_s.S
+===================================================================
+--- chromium-browser-46.0.2490.13.orig/third_party/openmax_dl/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix4_s.S
++++ chromium-browser-46.0.2490.13/third_party/openmax_dl/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix4_s.S
+@@ -80,8 +80,11 @@
+ // Neon Registers
+ 
+ #define dW1     v0.2s
++#define dW1s    v0.s
+ #define dW2     v1.2s
++#define dW2s    v1.s
+ #define dW3     v2.2s
++#define dW3s    v2.s
+ 
+ #define dXr0    v4.2s
+ #define dXi0    v5.2s
+@@ -182,49 +185,49 @@ radix4SetLoop\name :
+ 
+ 
+         .ifeqs  "\inverse", "TRUE"
+-            fmul   dZr1,dXr1,dW1[0]
+-            fmul   dZi1,dXi1,dW1[0]
+-            fmul   dZr2,dXr2,dW2[0]
+-            fmul   dZi2,dXi2,dW2[0]
+-            fmul   dZr3,dXr3,dW3[0]
+-            fmul   dZi3,dXi3,dW3[0]
++            fmul   dZr1,dXr1,dW1s[0]
++            fmul   dZi1,dXi1,dW1s[0]
++            fmul   dZr2,dXr2,dW2s[0]
++            fmul   dZi2,dXi2,dW2s[0]
++            fmul   dZr3,dXr3,dW3s[0]
++            fmul   dZi3,dXi3,dW3s[0]
+ 
+-            fmla   dZr1,dXi1,dW1[1]                // real part
+-            fmls   dZi1,dXr1,dW1[1]                // imag part
++            fmla   dZr1,dXi1,dW1s[1]                // real part
++            fmls   dZi1,dXr1,dW1s[1]                // imag part
+ 
+             //  data[1] for next iteration
+             ld2     {dXr1,dXi1},[pSrc],pointStep
+ 
+-            fmla   dZr2,dXi2,dW2[1]                // real part
+-            fmls   dZi2,dXr2,dW2[1]                // imag part
++            fmla   dZr2,dXi2,dW2s[1]                // real part
++            fmls   dZi2,dXr2,dW2s[1]                // imag part
+ 
+             //  data[2] for next iteration
+             ld2     {dXr2,dXi2},[pSrc],pointStep
+ 
+-            fmla   dZr3,dXi3,dW3[1]                // real part
+-            fmls   dZi3,dXr3,dW3[1]                // imag part
++            fmla   dZr3,dXi3,dW3s[1]                // real part
++            fmls   dZi3,dXr3,dW3s[1]                // imag part
+         .else
+-            fmul   dZr1,dXr1,dW1[0]
+-            fmul   dZi1,dXi1,dW1[0]
+-            fmul   dZr2,dXr2,dW2[0]
+-            fmul   dZi2,dXi2,dW2[0]
+-            fmul   dZr3,dXr3,dW3[0]
+-            fmul   dZi3,dXi3,dW3[0]
++            fmul   dZr1,dXr1,dW1s[0]
++            fmul   dZi1,dXi1,dW1s[0]
++            fmul   dZr2,dXr2,dW2s[0]
++            fmul   dZi2,dXi2,dW2s[0]
++            fmul   dZr3,dXr3,dW3s[0]
++            fmul   dZi3,dXi3,dW3s[0]
+ 
+-            fmls   dZr1,dXi1,dW1[1]                // real part
+-            fmla   dZi1,dXr1,dW1[1]                // imag part
++            fmls   dZr1,dXi1,dW1s[1]                // real part
++            fmla   dZi1,dXr1,dW1s[1]                // imag part
+ 
+             //  data[1] for next iteration
+             ld2     {dXr1,dXi1},[pSrc],pointStep
+ 
+-            fmls   dZr2,dXi2,dW2[1]                // real part
+-            fmla   dZi2,dXr2,dW2[1]                // imag part
++            fmls   dZr2,dXi2,dW2s[1]                // real part
++            fmla   dZi2,dXr2,dW2s[1]                // imag part
+ 
+             //  data[2] for next iteration
+             ld2     {dXr2,dXi2},[pSrc],pointStep
+ 
+-            fmls   dZr3,dXi3,dW3[1]                // real part
+-            fmla   dZi3,dXr3,dW3[1]                // imag part
++            fmls   dZr3,dXi3,dW3s[1]                // real part
++            fmla   dZi3,dXr3,dW3s[1]                // imag part
+         .endif
+ 
+         //  data[3] & update pSrc to data[0]
+Index: chromium-browser-46.0.2490.13/third_party/openmax_dl/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix8_fs_s.S
+===================================================================
+--- chromium-browser-46.0.2490.13.orig/third_party/openmax_dl/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix8_fs_s.S
++++ chromium-browser-46.0.2490.13/third_party/openmax_dl/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix8_fs_s.S
+@@ -352,10 +352,10 @@ radix8fsGrpZeroSetLoop\name :
+         .ifeqs  "\inverse", "TRUE"
+ 
+             // calculate a*v5
+-            fmul    dT1,dVr5,dT0[0]              // use dVi0 for dT1
++            fmul    dT1,dVr5,dT0s[0]              // use dVi0 for dT1
+ 
+             ld2     {dXr4,dXi4},[pSrc],pointStep //  data[4]
+-            fmul    dVi5,dVi5,dT0[0]
++            fmul    dVi5,dVi5,dT0s[0]
+ 
+             ld2     {dXr5,dXi5},[pSrc],pointStep //  data[5]
+             fsub    dVr5,dT1,dVi5                // a * V5
+@@ -364,8 +364,8 @@ radix8fsGrpZeroSetLoop\name :
+             ld2     {dXr6,dXi6},[pSrc],pointStep //  data[6]
+ 
+             // calculate  b*v7
+-            fmul    dT1,dVr7,dT0[0]
+-            fmul    dVi7,dVi7,dT0[0]
++            fmul    dT1,dVr7,dT0s[0]
++            fmul    dVi7,dVi7,dT0s[0]
+ 
+             // fadd    qY1,qV1,qV5
+             // fsub    qY5,qV1,qV5
+@@ -399,9 +399,9 @@ radix8SkipLastUpdateInv\name:
+         .else
+ 
+             // calculate  b*v7
+-            fmul    dT1,dVr7,dT0[0]
++            fmul    dT1,dVr7,dT0s[0]
+             ld2     {dXr4,dXi4},[pSrc],pointStep //  data[4]
+-            fmul    dVi7,dVi7,dT0[0]
++            fmul    dVi7,dVi7,dT0s[0]
+ 
+             ld2     {dXr5,dXi5},[pSrc],pointStep //  data[5]
+             fadd    dVr7,dT1,dVi7                     // b * V7
+@@ -410,8 +410,8 @@ radix8SkipLastUpdateInv\name:
+             ld2     {dXr6,dXi6},[pSrc],pointStep //  data[6]
+ 
+             // calculate a*v5
+-            fmul    dT1,dVr5,dT0[0]              // use dVi0 for dT1
+-            fmul    dVi5,dVi5,dT0[0]
++            fmul    dT1,dVr5,dT0s[0]              // use dVi0 for dT1
++            fmul    dVi5,dVi5,dT0s[0]
+ 
+             fadd    dYr7,dVr3,dVr7
+             fadd    dYi7,dVi3,dVi7
+Index: chromium-browser-46.0.2490.13/third_party/openmax_dl/dl/sp/api/armSP.h
+===================================================================
+--- chromium-browser-46.0.2490.13.orig/third_party/openmax_dl/dl/sp/api/armSP.h
++++ chromium-browser-46.0.2490.13/third_party/openmax_dl/dl/sp/api/armSP.h
+@@ -93,11 +93,11 @@ typedef struct ARMsFFTSpec_FC32_Tag
+ /*
+  * Compute log2(x), where x must be a power of 2.
+  */
+-static inline OMX_U32 fastlog2(long x) {
++static inline OMX_U32 fastlog2(OMX_U32 x) {
+   OMX_U32 out;
+-  asm("clz %0,%1\n\t"
+-      "sub %0, %0, #63\n\t"
+-      "neg %0, %0\n\t"
++  asm("clz %w0,%w1\n\t"
++      "sub %w0, %w0, #63\n\t"
++      "neg %w0, %w0\n\t"
+       : "=r"(out)
+       : "r"(x)
+       :);
diff --git a/debian/patches/series b/debian/patches/series
index d035781..a21ef3a 100644
--- a/debian/patches/series
+++ b/debian/patches/series
@@ -14,3 +14,6 @@ system/nspr.patch
 system/clang.patch
 system/ffmpeg.patch
 webui.patch
+silence-clang-warnings.patch
+aarch64_openmax_clang.patch
+aarch64-fixes.patch
diff --git a/debian/patches/silence-clang-warnings.patch b/debian/patches/silence-clang-warnings.patch
new file mode 100644
index 0000000..1b2fe05
--- /dev/null
+++ b/debian/patches/silence-clang-warnings.patch
@@ -0,0 +1,15 @@
+--- a/build/common.gypi
++++ b/build/common.gypi
+@@ -2631,10 +2631,10 @@
+         '-Wno-deprecated-register',
+ 
+         # TODO(hans): Get this cleaned up, http://crbug.com/428099
+-        '-Wno-inconsistent-missing-override',
++        #'-Wno-inconsistent-missing-override',
+ 
+         # TODO(thakis): Enable this, crbug.com/507717
+-        '-Wno-shift-negative-value',
++        #'-Wno-shift-negative-value',
+       ],
+     },
+     'includes': [ 'set_clang_warning_flags.gypi', ],
diff --git a/debian/rules b/debian/rules
index cb86461..6625530 100755
--- a/debian/rules
+++ b/debian/rules
@@ -6,6 +6,8 @@ export DH_VERBOSE=1
 # enable all build hardening flags
 export DEB_BUILD_MAINT_OPTIONS=hardening=+all
 
+DEB_HOST_ARCH ?= $(shell dpkg-architecture -qDEB_HOST_ARCH)
+
 # linker flags to avoid memory allocation issues on i386
 export LDFLAGS+=-Wl,--no-keep-memory -Wl,--reduce-memory-overheads -Wl,--hash-size=7919
 
@@ -15,6 +17,26 @@ export LDFLAGS+=-Wl,--trace -Wl,--stats
 # treat all warnings as errors
 defines=werror=
 
+ifeq (arm64,$(DEB_HOST_ARCH))
+defines += \
+        target_arch=arm64 \
+endif
+
+ifeq (armhf,$(DEB_HOST_ARCH))
+defines += \
+        sysroot= \
+        arm_neon=1 \
+        arm_use_neon=1 \
+        use_cups=1 \
+        v8_use_arm_eabi_hardfloat=true \
+        arm_fpu=neon \
+        arm_float_abi=hard \
+        arm_thumb=1 \
+        armv7=1 \
+        remove_webcore_debug_symbols=1 \
+        arm_version=7
+endif
+
 # use clang instead of gcc
 defines+=clang=1
 defines+=clang_use_chrome_plugins=
diff --git a/debian/scripts/chromium b/debian/scripts/chromium
index 28f2854..95cb25a 100644
--- a/debian/scripts/chromium
+++ b/debian/scripts/chromium
@@ -23,6 +23,12 @@ usage () {
   MANWIDTH=80 man chromium | sed -e '1,/OPTIONS/d; /ENVIRONMENT/,$d'
   echo " See 'man chromium' for more details"
 }
+noeon="\
+The hardware on this system lacks support for the NEON instruction set.
+The upstream chromium project supports poorly this configuration. In order
+to provide best experience for majority of users, this browser has been
+compiled and optimized for NEON enabled hardware.
+"
 
 nosse2="\
 The hardware on this system lacks support for the sse2 instruction set.
@@ -30,11 +36,21 @@ The upstream chromium project no longer supports this configuration.
 For more information, please read and possibly provide input to their
 bug tracking system at http://crbug.com/348761.";
 
-# Check whether this system supports sse2
-if test -z "$(grep sse2 /proc/cpuinfo)"; then
-  xmessage "$nosse2"
-  exit 1
-fi
+case `uname -m` in
+    i386|i586|i686|x86_64)
+        # Check whether this system supports sse2
+        if ! grep -q sse2 /proc/cpuinfo; then
+            xmessage "$nosse2"
+            exit 1
+        fi
+        ;;
+    arm7l|armv8l)
+        if ! grep -q neon /proc/cpuinfo; then
+            xmessage "$noneon"
+            exit 1
+        fi
+        ;;
+esac
 
 # Source additional settings
 for file in /etc/chromium.d/*; do
-- 
2.6.1

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