On Sat, Feb 24, 2018 at 06:09:30PM +0100, Manuel A. Fernandez Montecelo wrote:

> Source: libatomic-ops
> Version: 7.6.2-1
> Severity: normal
> Tags: patch upstream fixed-upstream
> User: debian-ri...@lists.debian.org
> Usertags: riscv64
> Forwarded: 
> https://github.com/ivmai/libatomic_ops/commit/27ca1b0f306cb99f14f863b22d490bb30c778300
> 
> Hello,
> 
> We need support in this package for RISC-V, to bootstrap the riscv64
> architecture.
> 
> A patch has been submitted upstream a few days ago, so it would be great if 
> you
> could include it as a patch and release a new version for unstable.
> 
> If we can help by NMUing the package or anything else, please let me/us know.
> 
> Thanks and cheers.
> --
> Manuel A. Fernandez Montecelo <m...@debian.org>

Hello Ian,

as one month has passed since the submission above I wanted to
kindly ask you about the state of affairs regarding this bug. 
Libatomic-ops is a hard requirement for building the essential
package set and a lot of packages transitively build-depend on
it, so the Debian riscv64 port cannot move forward without
having RISC-V support in the libatomic-ops package.

Attached is a patch against the Debian packaging that adds
four patches cherry-picked from upstream as quilt patches:

  
https://github.com/ivmai/libatomic_ops/commit/27ca1b0f306cb99f14f863b22d490bb30c778300
  
https://github.com/ivmai/libatomic_ops/commit/84ef64ebbf3df35756d083d08620b167547d6860
  
https://github.com/ivmai/libatomic_ops/commit/4f68118ead90f5a2940cea6baa28d24ab2fb9f74
  
https://github.com/ivmai/libatomic_ops/commit/393d7a7ff54565230f44e59a9c73addc9e627f56

It would be great if you could upload a new version of
libatomic-ops to unstable with these patches applied, so
that we can move forward with our port.

Kind regards,
Karsten
-- 
Gem. Par. 28 Abs. 4 Bundesdatenschutzgesetz widerspreche ich der Nutzung
sowie der Weitergabe meiner personenbezogenen Daten für Zwecke der
Werbung sowie der Markt- oder Meinungsforschung.
diff -Nur libatomic-ops-7.6.2.orig/debian/patches/riscv-0001-Add-RISC-V-support.patch libatomic-ops-7.6.2/debian/patches/riscv-0001-Add-RISC-V-support.patch
--- libatomic-ops-7.6.2.orig/debian/patches/riscv-0001-Add-RISC-V-support.patch
+++ libatomic-ops-7.6.2/debian/patches/riscv-0001-Add-RISC-V-support.patch
@@ -0,0 +1,65 @@
+From 235b22468d0cdc0718feed41067a5ceeb7079f98 Mon Sep 17 00:00:00 2001
+From: Shea Levy <s...@shealevy.com>
+Date: Sun, 18 Feb 2018 00:47:44 -0500
+Subject: [PATCH 1/4] Add RISC-V support
+Origin: https://github.com/ivmai/libatomic_ops/commit/27ca1b0f306cb99f14f863b22d490bb30c778300
+
+Issue #31 (libatomic_ops).
+
+* src/Makefile.am (nobase_private_HEADERS): Add riscv.h entry.
+* src/atomic_ops.h [__riscv]: Include riscv.h file.
+* src/atomic_ops/sysdeps/gcc/riscv.h: New file (just include generic.h).
+---
+ src/Makefile.am                    |  1 +
+ src/atomic_ops.h                   |  3 +++
+ src/atomic_ops/sysdeps/gcc/riscv.h | 12 ++++++++++++
+ 3 files changed, 16 insertions(+)
+ create mode 100644 src/atomic_ops/sysdeps/gcc/riscv.h
+
+diff --git a/src/Makefile.am b/src/Makefile.am
+index dadc932..084dd3c 100644
+--- a/src/Makefile.am
++++ b/src/Makefile.am
+@@ -92,6 +92,7 @@ nobase_private_HEADERS = atomic_ops/ao_version.h \
+           atomic_ops/sysdeps/gcc/mips.h \
+           atomic_ops/sysdeps/gcc/nios2.h \
+           atomic_ops/sysdeps/gcc/powerpc.h \
++          atomic_ops/sysdeps/gcc/riscv.h \
+           atomic_ops/sysdeps/gcc/s390.h \
+           atomic_ops/sysdeps/gcc/sh.h \
+           atomic_ops/sysdeps/gcc/sparc.h \
+diff --git a/src/atomic_ops.h b/src/atomic_ops.h
+index 187e1f9..22e516f 100644
+--- a/src/atomic_ops.h
++++ b/src/atomic_ops.h
+@@ -352,6 +352,9 @@
+ # if defined(__tile__)
+ #   include "atomic_ops/sysdeps/gcc/tile.h"
+ # endif
++# if defined(__riscv)
++#   include "atomic_ops/sysdeps/gcc/riscv.h"
++# endif
+ #endif /* __GNUC__ && !AO_USE_PTHREAD_DEFS */
+ 
+ #if (defined(__IBMC__) || defined(__IBMCPP__)) && !defined(__GNUC__) \
+diff --git a/src/atomic_ops/sysdeps/gcc/riscv.h b/src/atomic_ops/sysdeps/gcc/riscv.h
+new file mode 100644
+index 0000000..412c395
+--- /dev/null
++++ b/src/atomic_ops/sysdeps/gcc/riscv.h
+@@ -0,0 +1,12 @@
++/*
++ * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED
++ * OR IMPLIED.  ANY USE IS AT YOUR OWN RISK.
++ *
++ * Permission is hereby granted to use or copy this program
++ * for any purpose,  provided the above notices are retained on all copies.
++ * Permission to modify the code and to distribute modified code is granted,
++ * provided the above notices are retained, and a notice that the code was
++ * modified is included with the above copyright notice.
++ */
++
++#include "generic.h"
+-- 
+2.11.0
+
diff -Nur libatomic-ops-7.6.2.orig/debian/patches/riscv-0002-Update-AUTHORS-file-add-Shea-Levy.patch libatomic-ops-7.6.2/debian/patches/riscv-0002-Update-AUTHORS-file-add-Shea-Levy.patch
--- libatomic-ops-7.6.2.orig/debian/patches/riscv-0002-Update-AUTHORS-file-add-Shea-Levy.patch
+++ libatomic-ops-7.6.2/debian/patches/riscv-0002-Update-AUTHORS-file-add-Shea-Levy.patch
@@ -0,0 +1,25 @@
+From e7a9c17b1f90382ece0c961b3b5666392a841077 Mon Sep 17 00:00:00 2001
+From: Ivan Maidanski <iv...@mail.ru>
+Date: Mon, 19 Feb 2018 09:07:11 +0300
+Subject: [PATCH 2/4] Update AUTHORS file (add Shea Levy)
+Origin: https://github.com/ivmai/libatomic_ops/commit/84ef64ebbf3df35756d083d08620b167547d6860
+
+---
+ AUTHORS | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/AUTHORS b/AUTHORS
+index 4c4c062..c007366 100644
+--- a/AUTHORS
++++ b/AUTHORS
+@@ -43,6 +43,7 @@ Philipp Zambelli <pz...@iicm.edu>
+ Ranko Zivojnovic <ra...@spidernet.net>
+ Roger Hoover <roger.hoo...@gmail.com>
+ Sebastian Siewior <sebast...@breakpoint.cc>
++Shea Levy <s...@shealevy.com>
+ Steve Capper <steve.cap...@linaro.org>
+ Takashi Yoshii <takashi.yoshii...@renesas.com>
+ Thiemo Seufer <ica2...@csv.ica.uni-stuttgart.de>
+-- 
+2.11.0
+
diff -Nur libatomic-ops-7.6.2.orig/debian/patches/riscv-0003-Remove-gcc-nios2.h-and-gcc-riscv.h-files-include-gcc.patch libatomic-ops-7.6.2/debian/patches/riscv-0003-Remove-gcc-nios2.h-and-gcc-riscv.h-files-include-gcc.patch
--- libatomic-ops-7.6.2.orig/debian/patches/riscv-0003-Remove-gcc-nios2.h-and-gcc-riscv.h-files-include-gcc.patch
+++ libatomic-ops-7.6.2/debian/patches/riscv-0003-Remove-gcc-nios2.h-and-gcc-riscv.h-files-include-gcc.patch
@@ -0,0 +1,178 @@
+From 61e771fa994a361e16665b1f653dd5cfdb0fba9c Mon Sep 17 00:00:00 2001
+From: Ivan Maidanski <iv...@mail.ru>
+Date: Mon, 19 Feb 2018 09:45:50 +0300
+Subject: [PATCH 3/4] Remove gcc/nios2.h and gcc/riscv.h files, include gcc/generic.h directly (code refactoring)
+Origin: https://github.com/ivmai/libatomic_ops/commit/4f68118ead90f5a2940cea6baa28d24ab2fb9f74
+
+* src/Makefile.am (nobase_private_HEADERS): Remove nios2.h, riscv.h
+entries.
+* src/atomic_ops.h [__GNUC__ && !AO_USE_PTHREAD_DEFS
+&& !__INTEL_COMPILER]: Use #elif instead of #endif - #if pairs.
+* src/atomic_ops.h [__GNUC__ && !AO_USE_PTHREAD_DEFS
+&& !__INTEL_COMPILER && (__nios2__ || __riscv)]: Do not include
+gcc/nios2.h and gcc/riscv.h files; gcc/generic.h is included instead.
+* src/atomic_ops/sysdeps/gcc/nios2.h: Delete file.
+* src/atomic_ops/sysdeps/gcc/riscv.h: Likewise.
+---
+ src/Makefile.am                    |  2 --
+ src/atomic_ops.h                   | 59 ++++++++++++--------------------------
+ src/atomic_ops/sysdeps/gcc/nios2.h | 14 ---------
+ src/atomic_ops/sysdeps/gcc/riscv.h | 12 --------
+ 4 files changed, 19 insertions(+), 68 deletions(-)
+ delete mode 100644 src/atomic_ops/sysdeps/gcc/nios2.h
+ delete mode 100644 src/atomic_ops/sysdeps/gcc/riscv.h
+
+diff --git a/src/Makefile.am b/src/Makefile.am
+index 084dd3c..df70081 100644
+--- a/src/Makefile.am
++++ b/src/Makefile.am
+@@ -90,9 +90,7 @@ nobase_private_HEADERS = atomic_ops/ao_version.h \
+           atomic_ops/sysdeps/gcc/ia64.h \
+           atomic_ops/sysdeps/gcc/m68k.h \
+           atomic_ops/sysdeps/gcc/mips.h \
+-          atomic_ops/sysdeps/gcc/nios2.h \
+           atomic_ops/sysdeps/gcc/powerpc.h \
+-          atomic_ops/sysdeps/gcc/riscv.h \
+           atomic_ops/sysdeps/gcc/s390.h \
+           atomic_ops/sysdeps/gcc/sh.h \
+           atomic_ops/sysdeps/gcc/sparc.h \
+diff --git a/src/atomic_ops.h b/src/atomic_ops.h
+index 22e516f..cc7cb49 100644
+--- a/src/atomic_ops.h
++++ b/src/atomic_ops.h
+@@ -285,75 +285,54 @@
+     /* it might require specifying additional options (like -march)     */
+     /* or additional link libraries (if -march is not specified).       */
+ #   include "atomic_ops/sysdeps/gcc/x86.h"
+-# endif /* __i386__ */
+-# if defined(__x86_64__)
++# elif defined(__x86_64__)
+ #   if AO_GNUC_PREREQ(4, 2) && !defined(AO_USE_SYNC_CAS_BUILTIN)
+       /* It is safe to use __sync CAS built-in on this architecture.    */
+ #     define AO_USE_SYNC_CAS_BUILTIN
+ #   endif
+ #   include "atomic_ops/sysdeps/gcc/x86.h"
+-# endif /* __x86_64__ */
+-# if defined(__ia64__)
++# elif defined(__ia64__)
+ #   include "atomic_ops/sysdeps/gcc/ia64.h"
+ #   define AO_GENERALIZE_TWICE
+-# endif /* __ia64__ */
+-# if defined(__hppa__)
++# elif defined(__hppa__)
+ #   include "atomic_ops/sysdeps/gcc/hppa.h"
+ #   define AO_CAN_EMUL_CAS
+-# endif /* __hppa__ */
+-# if defined(__alpha__)
++# elif defined(__alpha__)
+ #   include "atomic_ops/sysdeps/gcc/alpha.h"
+ #   define AO_GENERALIZE_TWICE
+-# endif /* __alpha__ */
+-# if defined(__s390__)
++# elif defined(__s390__)
+ #   include "atomic_ops/sysdeps/gcc/s390.h"
+-# endif /* __s390__ */
+-# if defined(__sparc__)
++# elif defined(__sparc__)
+ #   include "atomic_ops/sysdeps/gcc/sparc.h"
+ #   define AO_CAN_EMUL_CAS
+-# endif /* __sparc__ */
+-# if defined(__m68k__)
++# elif defined(__m68k__)
+ #   include "atomic_ops/sysdeps/gcc/m68k.h"
+-# endif /* __m68k__ */
+-# if defined(__nios2__)
+-#   include "atomic_ops/sysdeps/gcc/nios2.h"
+-# endif /* __nios2__ */
+-# if defined(__powerpc__) || defined(__ppc__) || defined(__PPC__) \
+-     || defined(__powerpc64__) || defined(__ppc64__) \
+-     || defined(_ARCH_PPC)
++# elif defined(__powerpc__) || defined(__ppc__) || defined(__PPC__) \
++       || defined(__powerpc64__) || defined(__ppc64__) || defined(_ARCH_PPC)
+ #   include "atomic_ops/sysdeps/gcc/powerpc.h"
+-# endif /* __powerpc__ */
+-# if defined(__aarch64__)
++# elif defined(__aarch64__)
+ #   include "atomic_ops/sysdeps/gcc/aarch64.h"
+ #   define AO_CAN_EMUL_CAS
+-# endif /* __aarch64__ */
+-# if defined(__arm__)
++# elif defined(__arm__)
+ #   include "atomic_ops/sysdeps/gcc/arm.h"
+ #   define AO_CAN_EMUL_CAS
+-# endif /* __arm__ */
+-# if defined(__cris__) || defined(CRIS)
++# elif defined(__cris__) || defined(CRIS)
+ #   include "atomic_ops/sysdeps/gcc/cris.h"
+ #   define AO_CAN_EMUL_CAS
+ #   define AO_GENERALIZE_TWICE
+-# endif
+-# if defined(__mips__)
++# elif defined(__mips__)
+ #   include "atomic_ops/sysdeps/gcc/mips.h"
+-# endif /* __mips__ */
+-# if defined(__sh__) || defined(SH4)
++# elif defined(__sh__) || defined(SH4)
+ #   include "atomic_ops/sysdeps/gcc/sh.h"
+ #   define AO_CAN_EMUL_CAS
+-# endif /* __sh__ */
+-# if defined(__avr32__)
++# elif defined(__avr32__)
+ #   include "atomic_ops/sysdeps/gcc/avr32.h"
+-# endif
+-# if defined(__hexagon__)
++# elif defined(__hexagon__)
+ #   include "atomic_ops/sysdeps/gcc/hexagon.h"
+-# endif
+-# if defined(__tile__)
++# elif defined(__tile__)
+ #   include "atomic_ops/sysdeps/gcc/tile.h"
+-# endif
+-# if defined(__riscv)
+-#   include "atomic_ops/sysdeps/gcc/riscv.h"
++# else /* __nios2__, __riscv, etc. */
++#   include "atomic_ops/sysdeps/gcc/generic.h"
+ # endif
+ #endif /* __GNUC__ && !AO_USE_PTHREAD_DEFS */
+ 
+diff --git a/src/atomic_ops/sysdeps/gcc/nios2.h b/src/atomic_ops/sysdeps/gcc/nios2.h
+deleted file mode 100644
+index a1581bd..0000000
+--- a/src/atomic_ops/sysdeps/gcc/nios2.h
++++ /dev/null
+@@ -1,14 +0,0 @@
+-/*
+- * Copyright (C) 2016 Marek Vasut <ma...@denx.de>
+- *
+- * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED
+- * OR IMPLIED. ANY USE IS AT YOUR OWN RISK.
+- *
+- * Permission is hereby granted to use or copy this program
+- * for any purpose, provided the above notices are retained on all copies.
+- * Permission to modify the code and to distribute modified code is granted,
+- * provided the above notices are retained, and a notice that the code was
+- * modified is included with the above copyright notice.
+- */
+-
+-#include "generic.h"
+diff --git a/src/atomic_ops/sysdeps/gcc/riscv.h b/src/atomic_ops/sysdeps/gcc/riscv.h
+deleted file mode 100644
+index 412c395..0000000
+--- a/src/atomic_ops/sysdeps/gcc/riscv.h
++++ /dev/null
+@@ -1,12 +0,0 @@
+-/*
+- * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED
+- * OR IMPLIED.  ANY USE IS AT YOUR OWN RISK.
+- *
+- * Permission is hereby granted to use or copy this program
+- * for any purpose,  provided the above notices are retained on all copies.
+- * Permission to modify the code and to distribute modified code is granted,
+- * provided the above notices are retained, and a notice that the code was
+- * modified is included with the above copyright notice.
+- */
+-
+-#include "generic.h"
+-- 
+2.11.0
+
diff -Nur libatomic-ops-7.6.2.orig/debian/patches/riscv-0004-Enable-CAS-for-byte-and-short-on-RISC-V.patch libatomic-ops-7.6.2/debian/patches/riscv-0004-Enable-CAS-for-byte-and-short-on-RISC-V.patch
--- libatomic-ops-7.6.2.orig/debian/patches/riscv-0004-Enable-CAS-for-byte-and-short-on-RISC-V.patch
+++ libatomic-ops-7.6.2/debian/patches/riscv-0004-Enable-CAS-for-byte-and-short-on-RISC-V.patch
@@ -0,0 +1,86 @@
+From f7b442827f794a5dac9ea1818cfca98fe99143f4 Mon Sep 17 00:00:00 2001
+From: Ivan Maidanski <iv...@mail.ru>
+Date: Wed, 21 Feb 2018 10:58:33 +0300
+Subject: [PATCH 4/4] Enable CAS for byte and short on RISC-V
+Origin: https://github.com/ivmai/libatomic_ops/commit/393d7a7ff54565230f44e59a9c73addc9e627f56
+
+Issue #31 (libatomic_ops).
+
+At least for gcc-7.2.0 does not define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
+and __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2 macros but, nonetheless, all the
+provided CAS operations are lock-free (except for double-word).
+
+* src/Makefile.am (nobase_private_HEADERS): Add gcc/riscv.h entry.
+* src/atomic_ops.h [__GNUC__ && !AO_USE_PTHREAD_DEFS
+&& !__INTEL_COMPILER && __riscv]: Include gcc/riscv.h file.
+* src/atomic_ops/sysdeps/gcc/riscv.h: New file (include generic.h).
+* src/atomic_ops/sysdeps/gcc/riscv.h (AO_GCC_FORCE_HAVE_CAS): Define
+before include generic.h (and undefined at the end of file); add
+comment about double-word operations.
+---
+ src/Makefile.am                    |  1 +
+ src/atomic_ops.h                   |  4 +++-
+ src/atomic_ops/sysdeps/gcc/riscv.h | 22 ++++++++++++++++++++++
+ 3 files changed, 26 insertions(+), 1 deletion(-)
+ create mode 100644 src/atomic_ops/sysdeps/gcc/riscv.h
+
+diff --git a/src/Makefile.am b/src/Makefile.am
+index df70081..ae5f24f 100644
+--- a/src/Makefile.am
++++ b/src/Makefile.am
+@@ -91,6 +91,7 @@ nobase_private_HEADERS = atomic_ops/ao_version.h \
+           atomic_ops/sysdeps/gcc/m68k.h \
+           atomic_ops/sysdeps/gcc/mips.h \
+           atomic_ops/sysdeps/gcc/powerpc.h \
++          atomic_ops/sysdeps/gcc/riscv.h \
+           atomic_ops/sysdeps/gcc/s390.h \
+           atomic_ops/sysdeps/gcc/sh.h \
+           atomic_ops/sysdeps/gcc/sparc.h \
+diff --git a/src/atomic_ops.h b/src/atomic_ops.h
+index cc7cb49..e7597d0 100644
+--- a/src/atomic_ops.h
++++ b/src/atomic_ops.h
+@@ -329,9 +329,11 @@
+ #   include "atomic_ops/sysdeps/gcc/avr32.h"
+ # elif defined(__hexagon__)
+ #   include "atomic_ops/sysdeps/gcc/hexagon.h"
++# elif defined(__riscv)
++#   include "atomic_ops/sysdeps/gcc/riscv.h"
+ # elif defined(__tile__)
+ #   include "atomic_ops/sysdeps/gcc/tile.h"
+-# else /* __nios2__, __riscv, etc. */
++# else /* __nios2__, etc. */
+ #   include "atomic_ops/sysdeps/gcc/generic.h"
+ # endif
+ #endif /* __GNUC__ && !AO_USE_PTHREAD_DEFS */
+diff --git a/src/atomic_ops/sysdeps/gcc/riscv.h b/src/atomic_ops/sysdeps/gcc/riscv.h
+new file mode 100644
+index 0000000..ce72816
+--- /dev/null
++++ b/src/atomic_ops/sysdeps/gcc/riscv.h
+@@ -0,0 +1,22 @@
++/*
++ * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED
++ * OR IMPLIED.  ANY USE IS AT YOUR OWN RISK.
++ *
++ * Permission is hereby granted to use or copy this program
++ * for any purpose,  provided the above notices are retained on all copies.
++ * Permission to modify the code and to distribute modified code is granted,
++ * provided the above notices are retained, and a notice that the code was
++ * modified is included with the above copyright notice.
++ */
++
++/* As of gcc-7.2.0, some __GCC_HAVE_SYNC_COMPARE_AND_SWAP_n are missing. */
++/* The operations are lock-free (even for the types smaller than word).  */
++#define AO_GCC_FORCE_HAVE_CAS
++
++/* While double-word atomic operations are provided by the compiler     */
++/* (which requires -latomic currently), they are not lock-free as       */
++/* riscv itself does not have the double-word atomic operations.        */
++
++#include "generic.h"
++
++#undef AO_GCC_FORCE_HAVE_CAS
+-- 
+2.11.0
+
diff -Nur libatomic-ops-7.6.2.orig/debian/patches/series libatomic-ops-7.6.2/debian/patches/series
--- libatomic-ops-7.6.2.orig/debian/patches/series
+++ libatomic-ops-7.6.2/debian/patches/series
@@ -1,2 +1,4 @@
-
-
+riscv-0001-Add-RISC-V-support.patch
+riscv-0002-Update-AUTHORS-file-add-Shea-Levy.patch
+riscv-0003-Remove-gcc-nios2.h-and-gcc-riscv.h-files-include-gcc.patch
+riscv-0004-Enable-CAS-for-byte-and-short-on-RISC-V.patch

Reply via email to