ChangeLog | 397 +++ Makefile.am | 1 configure.ac | 51 debian/changelog | 61 debian/control | 34 debian/libdrm-intel1.install | 2 debian/libdrm-intel1.symbols | 2 debian/libdrm-nouveau1.symbols | 6 debian/libdrm-radeon1.symbols | 2 debian/libdrm2.install | 2 debian/patches/02_fix_kms_detection_with_linux_backport_modules.diff | 33 debian/patches/03_revert_abi_change.diff | 1220 ---------- debian/patches/04_git_nouveau_fix_sigsegv_in_nouveau_bo_new_tile.patch | 27 debian/patches/series | 3 debian/rules | 15 include/drm/Makefile.am | 2 include/drm/i915_drm.h | 56 include/drm/radeon_drm.h | 1 include/drm/vmwgfx_drm.h | 63 intel/Makefile.am | 3 intel/intel_atomic.h | 93 intel/intel_bufmgr.c | 12 intel/intel_bufmgr.h | 5 intel/intel_bufmgr_gem.c | 348 ++ intel/intel_bufmgr_priv.h | 5 intel/intel_chipset.h | 90 intel/libdrm_intel.pc.in | 2 libdrm.pc.in | 2 libkms/Makefile.am | 5 libkms/intel.c | 2 libkms/internal.h | 2 libkms/libkms.pc.in | 2 libkms/linux.c | 4 libkms/nouveau.c | 220 + nouveau/Makefile.am | 2 nouveau/libdrm_nouveau.pc.in | 3 nouveau/nouveau_bo.c | 2 nouveau/nouveau_channel.c | 2 nouveau/nouveau_class.h | 544 ++-- nouveau/nouveau_private.h | 1 nouveau/nouveau_reloc.c | 6 radeon/Makefile.am | 2 radeon/libdrm_radeon.pc.in | 2 radeon/radeon_bo.h | 1 radeon/radeon_bo_gem.c | 9 radeon/radeon_bo_gem.h | 1 radeon/radeon_cs.c | 6 radeon/radeon_cs.h | 2 radeon/radeon_cs_gem.c | 129 - radeon/radeon_cs_int.h | 1 tests/kmstest/main.c | 1 tests/modeprint/modeprint.c | 4 tests/modetest/modetest.c | 29 xf86atomic.h | 99 xf86drmMode.h | 2 55 files changed, 1740 insertions(+), 1881 deletions(-)
New commits: commit 14355c24519c0b8de1d2745c49bb2e01846da3a9 Author: Robert Hooker <[email protected]> Date: Fri May 14 14:06:03 2010 -0400 Update changelog. diff --git a/debian/changelog b/debian/changelog index 39a47bf..485e71e 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,10 +1,11 @@ libdrm (2.4.20-2ubuntu1) maverick; urgency=low - * Merge from debian unstable, remaining changes: + * Merge from debian experimental, remaining changes: - Dropped patches: 02_fix_kms_detection_with_linux_backport_modules.diff - Obsolete 03_revert_abi_change.diff - Obsolete 04_git_nouveau_fix_sigsegv_in_nouveau_bo_new_tile.patch - Upstream + * Refresh libdrm-nouveau1 symbols -- Robert Hooker <[email protected]> Fri, 14 May 2010 13:47:41 -0400 commit 4aff8ba91bc496d688a7342fa5e842aa941fb53d Author: Robert Hooker <[email protected]> Date: Fri May 14 14:04:49 2010 -0400 Refresh libdrm-nouveau1 symbols. diff --git a/debian/libdrm-nouveau1.symbols b/debian/libdrm-nouveau1.symbols index 48ce118..52dd5c6 100644 --- a/debian/libdrm-nouveau1.symbols +++ b/debian/libdrm-nouveau1.symbols @@ -12,12 +12,12 @@ libdrm_nouveau.so.1 libdrm-nouveau1 #MINVER# nouveau_bo_...@base 2.4.4 nouveau_bo_new_t...@base 2.4.11-1ubuntu1~ nouveau_bo_pend...@base 2.4.16 - nouveau_bo_...@base 2.4.4 +#MISSING: 2.4.20# nouveau_bo_...@base 2.4.4 nouveau_bo_...@base 2.4.4 nouveau_bo_taked...@base 2.4.4 #MISSING: 2.4.12+git20090729.5a73f066# nouveau_bo_t...@base 2.4.4 nouveau_bo_un...@base 2.4.4 - nouveau_bo_un...@base 2.4.4 +#MISSING: 2.4.20# nouveau_bo_un...@base 2.4.4 nouveau_bo_u...@base 2.4.4 #MISSING: 2.4.12+git20090729.5a73f066# nouveau_bo_validate_n...@base 2.4.4 nouveau_bo_w...@base 2.4.11-1ubuntu1~ @@ -53,6 +53,8 @@ libdrm_nouveau.so.1 libdrm-nouveau1 #MINVER# nouveau_pushbuf_i...@base 2.4.4 nouveau_pushbuf_marker_e...@base 2.4.16 nouveau_pushbuf_marker_u...@base 2.4.16 + nouveau_pushbuf_sub...@base 2.4.20 + nouveau_reloc_e...@base 2.4.20 nouveau_resource_al...@base 2.4.4 nouveau_resource_dest...@base 2.4.18 nouveau_resource_f...@base 2.4.4 commit cfd066312d6e30986f80186003c36ee513fc2367 Author: Robert Hooker <[email protected]> Date: Fri May 14 13:51:10 2010 -0400 Update changelog. diff --git a/debian/changelog b/debian/changelog index eaab6c4..39a47bf 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,3 +1,13 @@ +libdrm (2.4.20-2ubuntu1) maverick; urgency=low + + * Merge from debian unstable, remaining changes: + - Dropped patches: + 02_fix_kms_detection_with_linux_backport_modules.diff - Obsolete + 03_revert_abi_change.diff - Obsolete + 04_git_nouveau_fix_sigsegv_in_nouveau_bo_new_tile.patch - Upstream + + -- Robert Hooker <[email protected]> Fri, 14 May 2010 13:47:41 -0400 + libdrm (2.4.20-2) experimental; urgency=low * Upload again, faking a new upstream version, since a screw-up on commit 46409ec3c497866231c567110e42dae881b20982 Author: Robert Hooker <[email protected]> Date: Fri May 14 13:45:17 2010 -0400 Drop upstream and obsolete patches. diff --git a/debian/patches/02_fix_kms_detection_with_linux_backport_modules.diff b/debian/patches/02_fix_kms_detection_with_linux_backport_modules.diff deleted file mode 100644 index b4b2ecc..0000000 --- a/debian/patches/02_fix_kms_detection_with_linux_backport_modules.diff +++ /dev/null @@ -1,33 +0,0 @@ -Index: libdrm/xf86drmMode.c -=================================================================== ---- libdrm.orig/xf86drmMode.c 2010-02-01 12:41:44.603591443 +1100 -+++ libdrm/xf86drmMode.c 2010-02-01 12:46:55.943922337 +1100 -@@ -620,6 +620,28 @@ - return 0; - } - -+ /* Ubuntu's linux-backports-modules renames the drm module to lbm-drm -+ to avoid conflicting with existing drm modules. We therefore need -+ to search in $DIR/lbm-drm as well as $DIR/drm */ -+ sprintf(pci_dev_dir, "/sys/bus/pci/devices/%04x:%02x:%02x.%d/lbm-drm", -+ domain, bus, dev, func); -+ -+ sysdir = opendir(pci_dev_dir); -+ if (sysdir) { -+ dent = readdir(sysdir); -+ while (dent) { -+ if (!strncmp(dent->d_name, "controlD", 8)) { -+ found = 1; -+ break; -+ } -+ -+ dent = readdir(sysdir); -+ } -+ closedir(sysdir); -+ if (found) -+ return 0; -+ } -+ - sprintf(pci_dev_dir, "/sys/bus/pci/devices/%04x:%02x:%02x.%d/", - domain, bus, dev, func); - diff --git a/debian/patches/03_revert_abi_change.diff b/debian/patches/03_revert_abi_change.diff deleted file mode 100644 index c085405..0000000 --- a/debian/patches/03_revert_abi_change.diff +++ /dev/null @@ -1,2158 +0,0 @@ -<<<<<<< HEAD -======= -Revert nouveau ABI change to match what is in 2.6.33. - -This reverts commits after b496c63143e9a4ca02011582329bce2df99d9b7c -except those that only touch the build system: - e73af7f560c95ba9c665bead7fc8eb1471db9975 - 976e779f9cd0571dd2c218580485b39d37bd18a0 - ->>>>>>> libdrm-2.4.20-2 -diff --git a/include/drm/nouveau_drm.h b/include/drm/nouveau_drm.h -index a6a9f4a..f745948 100644 ---- a/include/drm/nouveau_drm.h -+++ b/include/drm/nouveau_drm.h -@@ -25,14 +25,13 @@ - #ifndef __NOUVEAU_DRM_H__ - #define __NOUVEAU_DRM_H__ - --#define NOUVEAU_DRM_HEADER_PATCHLEVEL 16 -+#define NOUVEAU_DRM_HEADER_PATCHLEVEL 15 - - struct drm_nouveau_channel_alloc { - uint32_t fb_ctxdma_handle; - uint32_t tt_ctxdma_handle; - - int channel; -- uint32_t pushbuf_domains; - - /* Notifier memory */ - uint32_t notifier_handle; -@@ -110,58 +109,68 @@ struct drm_nouveau_gem_new { - uint32_t align; - }; - --#define NOUVEAU_GEM_MAX_BUFFERS 1024 --struct drm_nouveau_gem_pushbuf_bo_presumed { -- uint32_t valid; -- uint32_t domain; -- uint64_t offset; --}; -- - struct drm_nouveau_gem_pushbuf_bo { - uint64_t user_priv; - uint32_t handle; - uint32_t read_domains; - uint32_t write_domains; - uint32_t valid_domains; -- struct drm_nouveau_gem_pushbuf_bo_presumed presumed; -+ uint32_t presumed_ok; -+ uint32_t presumed_domain; -+ uint64_t presumed_offset; - }; - - #define NOUVEAU_GEM_RELOC_LOW (1 << 0) - #define NOUVEAU_GEM_RELOC_HIGH (1 << 1) - #define NOUVEAU_GEM_RELOC_OR (1 << 2) --#define NOUVEAU_GEM_MAX_RELOCS 1024 - struct drm_nouveau_gem_pushbuf_reloc { -- uint32_t reloc_bo_index; -- uint32_t reloc_bo_offset; - uint32_t bo_index; -+ uint32_t reloc_index; - uint32_t flags; - uint32_t data; - uint32_t vor; - uint32_t tor; - }; - --#define NOUVEAU_GEM_MAX_PUSH 512 --struct drm_nouveau_gem_pushbuf_push { -- uint32_t bo_index; -- uint32_t pad; -- uint64_t offset; -- uint64_t length; --}; -+#define NOUVEAU_GEM_MAX_BUFFERS 1024 -+#define NOUVEAU_GEM_MAX_RELOCS 1024 - - struct drm_nouveau_gem_pushbuf { - uint32_t channel; -+ uint32_t nr_dwords; - uint32_t nr_buffers; -+ uint32_t nr_relocs; -+ uint64_t dwords; - uint64_t buffers; -+ uint64_t relocs; -+}; -+ -+struct drm_nouveau_gem_pushbuf_call { -+ uint32_t channel; -+ uint32_t handle; -+ uint32_t offset; -+ uint32_t nr_buffers; - uint32_t nr_relocs; -- uint32_t nr_push; -+ uint32_t nr_dwords; -+ uint64_t buffers; - uint64_t relocs; -- uint64_t push; - uint32_t suffix0; - uint32_t suffix1; -+ /* below only accessed for CALL2 */ - uint64_t vram_available; - uint64_t gart_available; - }; - -+struct drm_nouveau_gem_pin { -+ uint32_t handle; -+ uint32_t domain; -+ uint64_t offset; -+}; -+ -+struct drm_nouveau_gem_unpin { -+ uint32_t handle; -+}; -+ - #define NOUVEAU_GEM_CPU_PREP_NOWAIT 0x00000001 - #define NOUVEAU_GEM_CPU_PREP_NOBLOCK 0x00000002 - #define NOUVEAU_GEM_CPU_PREP_WRITE 0x00000004 -@@ -174,6 +183,14 @@ struct drm_nouveau_gem_cpu_fini { - uint32_t handle; - }; - -+struct drm_nouveau_gem_tile { -+ uint32_t handle; -+ uint32_t offset; -+ uint32_t size; -+ uint32_t tile_mode; -+ uint32_t tile_flags; -+}; -+ - enum nouveau_bus_type { - NV_AGP = 0, - NV_PCI = 1, -@@ -183,17 +200,22 @@ enum nouveau_bus_type { - struct drm_nouveau_sarea { - }; - --#define DRM_NOUVEAU_GETPARAM 0x00 --#define DRM_NOUVEAU_SETPARAM 0x01 --#define DRM_NOUVEAU_CHANNEL_ALLOC 0x02 --#define DRM_NOUVEAU_CHANNEL_FREE 0x03 --#define DRM_NOUVEAU_GROBJ_ALLOC 0x04 --#define DRM_NOUVEAU_NOTIFIEROBJ_ALLOC 0x05 --#define DRM_NOUVEAU_GPUOBJ_FREE 0x06 -+#define DRM_NOUVEAU_CARD_INIT 0x00 -+#define DRM_NOUVEAU_GETPARAM 0x01 -+#define DRM_NOUVEAU_SETPARAM 0x02 -+#define DRM_NOUVEAU_CHANNEL_ALLOC 0x03 -+#define DRM_NOUVEAU_CHANNEL_FREE 0x04 -+#define DRM_NOUVEAU_GROBJ_ALLOC 0x05 -+#define DRM_NOUVEAU_NOTIFIEROBJ_ALLOC 0x06 -+#define DRM_NOUVEAU_GPUOBJ_FREE 0x07 - #define DRM_NOUVEAU_GEM_NEW 0x40 - #define DRM_NOUVEAU_GEM_PUSHBUF 0x41 --#define DRM_NOUVEAU_GEM_CPU_PREP 0x42 --#define DRM_NOUVEAU_GEM_CPU_FINI 0x43 --#define DRM_NOUVEAU_GEM_INFO 0x44 -+#define DRM_NOUVEAU_GEM_PUSHBUF_CALL 0x42 -+#define DRM_NOUVEAU_GEM_PIN 0x43 /* !KMS only */ -+#define DRM_NOUVEAU_GEM_UNPIN 0x44 /* !KMS only */ -+#define DRM_NOUVEAU_GEM_CPU_PREP 0x45 -+#define DRM_NOUVEAU_GEM_CPU_FINI 0x46 -+#define DRM_NOUVEAU_GEM_INFO 0x47 -+#define DRM_NOUVEAU_GEM_PUSHBUF_CALL2 0x48 - - #endif /* __NOUVEAU_DRM_H__ */ -diff --git a/nouveau/Makefile.am b/nouveau/Makefile.am -<<<<<<< HEAD -index 5d759c5..70bbbb2 100644 -======= -index b6d214a..217b7ef 100644 ->>>>>>> libdrm-2.4.20-2 ---- a/nouveau/Makefile.am -+++ b/nouveau/Makefile.am -@@ -18,8 +18,7 @@ libdrm_nouveau_la_SOURCES = \ - nouveau_notifier.c \ - nouveau_bo.c \ - nouveau_resource.c \ -- nouveau_private.h \ -- nouveau_reloc.c -+ nouveau_private.h - - libdrm_nouveaucommonincludedir = ${includedir}/nouveau - libdrm_nouveaucommoninclude_HEADERS = \ -@@ -30,8 +29,7 @@ libdrm_nouveaucommoninclude_HEADERS = \ - nouveau_pushbuf.h \ - nouveau_bo.h \ - nouveau_resource.h \ -- nouveau_class.h \ -- nouveau_reloc.h -+ nouveau_class.h - - -<<<<<<< HEAD - libdrm_nouveauincludedir = ${includedir}/drm -diff --git a/nouveau/nouveau_bo.c b/nouveau/nouveau_bo.c -index 4973636..10cc8a6 100644 ---- a/nouveau/nouveau_bo.c -+++ b/nouveau/nouveau_bo.c -@@ -201,6 +201,14 @@ nouveau_bo_new_tile(struct nouveau_device *dev, uint32_t flags, int align, - nouveau_bo_ref(NULL, (void *)nvbo); -======= - libdrm_nouveauincludedir = ${includedir}/libdrm -diff --git a/nouveau/nouveau_bo.c b/nouveau/nouveau_bo.c -index 32b23b6..10cc8a6 100644 ---- a/nouveau/nouveau_bo.c -+++ b/nouveau/nouveau_bo.c -@@ -198,9 +198,17 @@ nouveau_bo_new_tile(struct nouveau_device *dev, uint32_t flags, int align, - if (flags & (NOUVEAU_BO_VRAM | NOUVEAU_BO_GART)) { - ret = nouveau_bo_kalloc(nvbo, NULL); - if (ret) { -- nouveau_bo_ref(NULL, (void *)&nvbo); -+ nouveau_bo_ref(NULL, (void *)nvbo); ->>>>>>> libdrm-2.4.20-2 - return ret; - } -+ -+ if (flags & NOUVEAU_BO_PIN) { -+ ret = nouveau_bo_pin((void *)nvbo, nvbo->flags); -+ if (ret) { -+ nouveau_bo_ref(NULL, (void *)nvbo); -+ return ret; -+ } -+ } - } - - *bo = &nvbo->base; -@@ -211,7 +219,16 @@ int - nouveau_bo_new(struct nouveau_device *dev, uint32_t flags, int align, - int size, struct nouveau_bo **bo) - { -- return nouveau_bo_new_tile(dev, flags, align, size, 0, 0, bo); -+ uint32_t tile_flags = 0; -+ -+ if (flags & NOUVEAU_BO_TILED) { -+ if (flags & NOUVEAU_BO_ZTILE) -+ tile_flags = 0x2800; -+ else -+ tile_flags = 0x7000; -+ } -+ -+ return nouveau_bo_new_tile(dev, flags, align, size, 0, tile_flags, bo); - } - - int -@@ -466,6 +483,62 @@ nouveau_bo_unmap(struct nouveau_bo *bo) - } - - int -+nouveau_bo_pin(struct nouveau_bo *bo, uint32_t flags) -+{ -+ struct nouveau_device_priv *nvdev = nouveau_device(bo->device); -+ struct nouveau_bo_priv *nvbo = nouveau_bo(bo); -+ struct drm_nouveau_gem_pin req; -+ int ret; -+ -+ if (nvbo->pinned) -+ return 0; -+ -+ if (!nvbo->handle) -+ return -EINVAL; -+ -+ /* Now force it to stay put :) */ -+ req.handle = nvbo->handle; -+ req.domain = 0; -+ if (flags & NOUVEAU_BO_VRAM) -+ req.domain |= NOUVEAU_GEM_DOMAIN_VRAM; -+ if (flags & NOUVEAU_BO_GART) -+ req.domain |= NOUVEAU_GEM_DOMAIN_GART; -+ -+ ret = drmCommandWriteRead(nvdev->fd, DRM_NOUVEAU_GEM_PIN, &req, -+ sizeof(struct drm_nouveau_gem_pin)); -+ if (ret) -+ return ret; -+ nvbo->offset = req.offset; -+ nvbo->domain = req.domain; -+ nvbo->pinned = 1; -+ -+ /* Fill in public nouveau_bo members */ -+ if (nvbo->domain & NOUVEAU_GEM_DOMAIN_VRAM) -+ bo->flags = NOUVEAU_BO_VRAM; -+ if (nvbo->domain & NOUVEAU_GEM_DOMAIN_GART) -+ bo->flags = NOUVEAU_BO_GART; -+ bo->offset = nvbo->offset; -+ -+ return 0; -+} -+ -+void -+nouveau_bo_unpin(struct nouveau_bo *bo) -+{ -+ struct nouveau_device_priv *nvdev = nouveau_device(bo->device); -+ struct nouveau_bo_priv *nvbo = nouveau_bo(bo); -+ struct drm_nouveau_gem_unpin req; -+ -+ if (!nvbo->pinned) -+ return; -+ -+ req.handle = nvbo->handle; -+ drmCommandWrite(nvdev->fd, DRM_NOUVEAU_GEM_UNPIN, &req, sizeof(req)); -+ -+ nvbo->pinned = bo->offset = bo->flags = 0; -+} -+ -+int - nouveau_bo_busy(struct nouveau_bo *bo, uint32_t access) - { - return nouveau_bo_wait(bo, (access & NOUVEAU_BO_WR), 1, 1); -@@ -492,7 +565,7 @@ nouveau_bo_pending(struct nouveau_bo *bo) - struct drm_nouveau_gem_pushbuf_bo * - nouveau_bo_emit_buffer(struct nouveau_channel *chan, struct nouveau_bo *bo) - { -- struct nouveau_pushbuf_priv *nvpb = &nouveau_channel(chan)->pb; -+ struct nouveau_pushbuf_priv *nvpb = nouveau_pushbuf(chan->pushbuf); - struct nouveau_bo_priv *nvbo = nouveau_bo(bo); - struct drm_nouveau_gem_pushbuf_bo *pbbo; - struct nouveau_bo *ref = NULL; -@@ -534,8 +607,8 @@ nouveau_bo_emit_buffer(struct nouveau_channel *chan, struct nouveau_bo *bo) - pbbo->valid_domains = NOUVEAU_GEM_DOMAIN_VRAM | NOUVEAU_GEM_DOMAIN_GART; - pbbo->read_domains = 0; - pbbo->write_domains = 0; -- pbbo->presumed.domain = nvbo->domain; -- pbbo->presumed.offset = nvbo->offset; -- pbbo->presumed.valid = 1; -+ pbbo->presumed_domain = nvbo->domain; -+ pbbo->presumed_offset = nvbo->offset; -+ pbbo->presumed_ok = 1; - return pbbo; - } -diff --git a/nouveau/nouveau_bo.h b/nouveau/nouveau_bo.h -index 1e77ab0..fdad63e 100644 ---- a/nouveau/nouveau_bo.h -+++ b/nouveau/nouveau_bo.h -@@ -30,9 +30,13 @@ - #define NOUVEAU_BO_WR (1 << 3) - #define NOUVEAU_BO_RDWR (NOUVEAU_BO_RD | NOUVEAU_BO_WR) - #define NOUVEAU_BO_MAP (1 << 4) -+#define NOUVEAU_BO_PIN (1 << 5) - #define NOUVEAU_BO_LOW (1 << 6) - #define NOUVEAU_BO_HIGH (1 << 7) - #define NOUVEAU_BO_OR (1 << 8) -+#define NOUVEAU_BO_LOCAL (1 << 9) -+#define NOUVEAU_BO_TILED (1 << 10) -+#define NOUVEAU_BO_ZTILE (1 << 11) - #define NOUVEAU_BO_INVAL (1 << 12) - #define NOUVEAU_BO_NOSYNC (1 << 13) - #define NOUVEAU_BO_NOWAIT (1 << 14) -@@ -48,6 +52,10 @@ struct nouveau_bo { - - uint32_t tile_mode; - uint32_t tile_flags; -+ -+ /* Available when buffer is pinned *only* */ -+ uint32_t flags; -+ uint64_t offset; - }; - - int -@@ -90,6 +98,12 @@ void - nouveau_bo_unmap(struct nouveau_bo *); - - int -+nouveau_bo_pin(struct nouveau_bo *, uint32_t flags); -+ -+void -+nouveau_bo_unpin(struct nouveau_bo *); -+ -+int - nouveau_bo_busy(struct nouveau_bo *, uint32_t access); - - uint32_t -<<<<<<< HEAD -======= -diff --git a/nouveau/nouveau_channel.c b/nouveau/nouveau_channel.c -index 40a0b34..5622c1d 100644 ---- a/nouveau/nouveau_channel.c -+++ b/nouveau/nouveau_channel.c -@@ -106,7 +106,7 @@ nouveau_channel_free(struct nouveau_channel **chan) - struct nouveau_channel_priv *nvchan; - struct nouveau_device_priv *nvdev; - struct drm_nouveau_channel_free cf; -- unsigned i; -+ int i; - - if (!chan || !*chan) - return; ->>>>>>> libdrm-2.4.20-2 -diff --git a/nouveau/nouveau_channel.h b/nouveau/nouveau_channel.h -index ddcf8e4..294f749 100644 ---- a/nouveau/nouveau_channel.h -+++ b/nouveau/nouveau_channel.h -@@ -29,12 +29,11 @@ struct nouveau_subchannel { - }; - - struct nouveau_channel { -- uint32_t *cur; -- uint32_t *end; -- - struct nouveau_device *device; - int id; - -+ struct nouveau_pushbuf *pushbuf; -+ - struct nouveau_grobj *nullobj; - struct nouveau_grobj *vram; - struct nouveau_grobj *gart; -<<<<<<< HEAD -======= -diff --git a/nouveau/nouveau_class.h b/nouveau/nouveau_class.h -index 0167cbc..8e7d0ff 100644 ---- a/nouveau/nouveau_class.h -+++ b/nouveau/nouveau_class.h -@@ -1549,7 +1549,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - #define NV04_TEXTURED_TRIANGLE_BLEND_SHADE_MODE_GOURAUD 0x00000080 - #define NV04_TEXTURED_TRIANGLE_BLEND_SHADE_MODE_PHONG 0x000000c0 - #define NV04_TEXTURED_TRIANGLE_BLEND_TEXTURE_PERSPECTIVE_ENABLE (1 << 8) --#define NV04_TEXTURED_TRIANGLE_BLEND_SPECULAR_ENABLE (1 << 12) -+#define NV04_TEXTURED_TRIANGLE_BLEND_SPECULAR_ENABLE_SHIFT 12 -+#define NV04_TEXTURED_TRIANGLE_BLEND_SPECULAR_ENABLE_MASK 0x0000f000 - #define NV04_TEXTURED_TRIANGLE_BLEND_FOG_ENABLE (1 << 16) - #define NV04_TEXTURED_TRIANGLE_BLEND_BLEND_ENABLE (1 << 20) - #define NV04_TEXTURED_TRIANGLE_BLEND_SRC_SHIFT 24 -@@ -1797,7 +1798,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - #define NV04_MULTITEX_TRIANGLE_BLEND_SHADE_MODE_GOURAUD 0x00000080 - #define NV04_MULTITEX_TRIANGLE_BLEND_SHADE_MODE_PHONG 0x000000c0 - #define NV04_MULTITEX_TRIANGLE_BLEND_TEXTURE_PERSPECTIVE_ENABLE (1 << 8) --#define NV04_MULTITEX_TRIANGLE_BLEND_SPECULAR_ENABLE (1 << 12) -+#define NV04_MULTITEX_TRIANGLE_BLEND_SPECULAR_ENABLE_SHIFT 12 -+#define NV04_MULTITEX_TRIANGLE_BLEND_SPECULAR_ENABLE_MASK 0x0000f000 - #define NV04_MULTITEX_TRIANGLE_BLEND_FOG_ENABLE (1 << 16) - #define NV04_MULTITEX_TRIANGLE_BLEND_BLEND_ENABLE (1 << 20) - #define NV04_MULTITEX_TRIANGLE_BLEND_SRC_SHIFT 24 -@@ -1961,10 +1963,11 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - #define NV10TCL_TX_FORMAT_DMA1 (1 << 1) - #define NV10TCL_TX_FORMAT_CUBE_MAP (1 << 2) - #define NV10TCL_TX_FORMAT_FORMAT_SHIFT 7 --#define NV10TCL_TX_FORMAT_FORMAT_MASK 0x00000f80 -+#define NV10TCL_TX_FORMAT_FORMAT_MASK 0x00000780 - #define NV10TCL_TX_FORMAT_FORMAT_L8 0x00000000 - #define NV10TCL_TX_FORMAT_FORMAT_A8 0x00000080 - #define NV10TCL_TX_FORMAT_FORMAT_A1R5G5B5 0x00000100 -+#define NV10TCL_TX_FORMAT_FORMAT_A8_RECT 0x00000180 - #define NV10TCL_TX_FORMAT_FORMAT_A4R4G4B4 0x00000200 - #define NV10TCL_TX_FORMAT_FORMAT_R5G6B5 0x00000280 - #define NV10TCL_TX_FORMAT_FORMAT_A8R8G8B8 0x00000300 -@@ -1976,7 +1979,25 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - #define NV10TCL_TX_FORMAT_FORMAT_A1R5G5B5_RECT 0x00000800 - #define NV10TCL_TX_FORMAT_FORMAT_R5G6B5_RECT 0x00000880 - #define NV10TCL_TX_FORMAT_FORMAT_A8R8G8B8_RECT 0x00000900 --#define NV10TCL_TX_FORMAT_FORMAT_A8_RECT 0x00000980 -+#define NV10TCL_TX_FORMAT_FORMAT_L8_RECT 0x00000980 -+#define NV10TCL_TX_FORMAT_FORMAT_A8L8 0x00000d00 -+#define NV10TCL_TX_FORMAT_FORMAT_A8_RECT2 0x00000d80 -+#define NV10TCL_TX_FORMAT_FORMAT_A4R4G4B4_RECT 0x00000e80 -+#define NV10TCL_TX_FORMAT_FORMAT_R8G8B8_RECT 0x00000f00 -+#define NV10TCL_TX_FORMAT_FORMAT_L8A8_RECT 0x00001000 -+#define NV10TCL_TX_FORMAT_FORMAT_DSDT 0x00001400 -+#define NV10TCL_TX_FORMAT_FORMAT_A16 0x00001900 -+#define NV10TCL_TX_FORMAT_FORMAT_HILO16 0x00001980 -+#define NV10TCL_TX_FORMAT_FORMAT_A16_RECT 0x00001a80 -+#define NV10TCL_TX_FORMAT_FORMAT_HILO16_RECT 0x00001b00 -+#define NV10TCL_TX_FORMAT_FORMAT_HILO8 0x00002200 -+#define NV10TCL_TX_FORMAT_FORMAT_SIGNED_HILO8 0x00002280 -+#define NV10TCL_TX_FORMAT_FORMAT_HILO8_RECT 0x00002300 -+#define NV10TCL_TX_FORMAT_FORMAT_SIGNED_HILO8_RECT 0x00002380 -+#define NV10TCL_TX_FORMAT_FORMAT_FLOAT_RGBA16_NV 0x00002500 -+#define NV10TCL_TX_FORMAT_FORMAT_FLOAT_RGBA32_NV 0x00002580 -+#define NV10TCL_TX_FORMAT_FORMAT_FLOAT_R32_NV 0x00002600 -+#define NV10TCL_TX_FORMAT_NPOT (1 << 11) - #define NV10TCL_TX_FORMAT_MIPMAP (1 << 15) - #define NV10TCL_TX_FORMAT_BASE_SIZE_U_SHIFT 16 - #define NV10TCL_TX_FORMAT_BASE_SIZE_U_MASK 0x000f0000 -@@ -2617,7 +2638,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - #define NV10TCL_RC_FINAL1_E_MAPPING_SIGNED_IDENTITY 0xc0000000 - #define NV10TCL_RC_FINAL1_E_MAPPING_SIGNED_NEGATE 0xe0000000 - #define NV10TCL_LIGHT_MODEL 0x00000294 --#define NV10TCL_LIGHT_MODEL_VERTEX_SPECULAR (1 << 0) - #define NV10TCL_LIGHT_MODEL_SEPARATE_SPECULAR (1 << 1) - #define NV10TCL_LIGHT_MODEL_LOCAL_VIEWER (1 << 16) - #define NV10TCL_COLOR_MATERIAL 0x00000298 -@@ -2866,38 +2886,38 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - #define NV10TCL_ENABLED_LIGHTS_7_NONPOSITIONAL 0x00004000 - #define NV10TCL_ENABLED_LIGHTS_7_POSITIONAL 0x00008000 - #define NV10TCL_ENABLED_LIGHTS_7_DIRECTIONAL 0x0000c000 --#define NV10TCL_TX_GEN_MODE_S(x) (0x000003c0+((x)*16)) --#define NV10TCL_TX_GEN_MODE_S__SIZE 0x00000002 --#define NV10TCL_TX_GEN_MODE_S_FALSE 0x00000000 --#define NV10TCL_TX_GEN_MODE_S_EYE_LINEAR 0x00002400 --#define NV10TCL_TX_GEN_MODE_S_OBJECT_LINEAR 0x00002401 --#define NV10TCL_TX_GEN_MODE_S_SPHERE_MAP 0x00002402 --#define NV10TCL_TX_GEN_MODE_S_NORMAL_MAP 0x00008511 --#define NV10TCL_TX_GEN_MODE_S_REFLECTION_MAP 0x00008512 --#define NV10TCL_TX_GEN_MODE_T(x) (0x000003c4+((x)*16)) --#define NV10TCL_TX_GEN_MODE_T__SIZE 0x00000002 --#define NV10TCL_TX_GEN_MODE_T_FALSE 0x00000000 --#define NV10TCL_TX_GEN_MODE_T_EYE_LINEAR 0x00002400 --#define NV10TCL_TX_GEN_MODE_T_OBJECT_LINEAR 0x00002401 --#define NV10TCL_TX_GEN_MODE_T_SPHERE_MAP 0x00002402 --#define NV10TCL_TX_GEN_MODE_T_NORMAL_MAP 0x00008511 --#define NV10TCL_TX_GEN_MODE_T_REFLECTION_MAP 0x00008512 --#define NV10TCL_TX_GEN_MODE_R(x) (0x000003c8+((x)*16)) --#define NV10TCL_TX_GEN_MODE_R__SIZE 0x00000002 --#define NV10TCL_TX_GEN_MODE_R_FALSE 0x00000000 --#define NV10TCL_TX_GEN_MODE_R_EYE_LINEAR 0x00002400 --#define NV10TCL_TX_GEN_MODE_R_OBJECT_LINEAR 0x00002401 --#define NV10TCL_TX_GEN_MODE_R_SPHERE_MAP 0x00002402 --#define NV10TCL_TX_GEN_MODE_R_NORMAL_MAP 0x00008511 --#define NV10TCL_TX_GEN_MODE_R_REFLECTION_MAP 0x00008512 --#define NV10TCL_TX_GEN_MODE_Q(x) (0x000003cc+((x)*16)) --#define NV10TCL_TX_GEN_MODE_Q__SIZE 0x00000002 --#define NV10TCL_TX_GEN_MODE_Q_FALSE 0x00000000 --#define NV10TCL_TX_GEN_MODE_Q_EYE_LINEAR 0x00002400 --#define NV10TCL_TX_GEN_MODE_Q_OBJECT_LINEAR 0x00002401 --#define NV10TCL_TX_GEN_MODE_Q_SPHERE_MAP 0x00002402 --#define NV10TCL_TX_GEN_MODE_Q_NORMAL_MAP 0x00008511 --#define NV10TCL_TX_GEN_MODE_Q_REFLECTION_MAP 0x00008512 -+#define NV10TCL_TX_GEN_S(x) (0x000003c0+((x)*16)) -+#define NV10TCL_TX_GEN_S__SIZE 0x00000002 -+#define NV10TCL_TX_GEN_S_FALSE 0x00000000 -+#define NV10TCL_TX_GEN_S_EYE_LINEAR 0x00002400 -+#define NV10TCL_TX_GEN_S_OBJECT_LINEAR 0x00002401 -+#define NV10TCL_TX_GEN_S_SPHERE_MAP 0x00002402 -+#define NV10TCL_TX_GEN_S_NORMAL_MAP 0x00008511 -+#define NV10TCL_TX_GEN_S_REFLECTION_MAP 0x00008512 -+#define NV10TCL_TX_GEN_T(x) (0x000003c4+((x)*16)) -+#define NV10TCL_TX_GEN_T__SIZE 0x00000002 -+#define NV10TCL_TX_GEN_T_FALSE 0x00000000 -+#define NV10TCL_TX_GEN_T_EYE_LINEAR 0x00002400 -+#define NV10TCL_TX_GEN_T_OBJECT_LINEAR 0x00002401 -+#define NV10TCL_TX_GEN_T_SPHERE_MAP 0x00002402 -+#define NV10TCL_TX_GEN_T_NORMAL_MAP 0x00008511 -+#define NV10TCL_TX_GEN_T_REFLECTION_MAP 0x00008512 -+#define NV10TCL_TX_GEN_R(x) (0x000003c8+((x)*16)) -+#define NV10TCL_TX_GEN_R__SIZE 0x00000002 -+#define NV10TCL_TX_GEN_R_FALSE 0x00000000 -+#define NV10TCL_TX_GEN_R_EYE_LINEAR 0x00002400 -+#define NV10TCL_TX_GEN_R_OBJECT_LINEAR 0x00002401 -+#define NV10TCL_TX_GEN_R_SPHERE_MAP 0x00002402 -+#define NV10TCL_TX_GEN_R_NORMAL_MAP 0x00008511 -+#define NV10TCL_TX_GEN_R_REFLECTION_MAP 0x00008512 -+#define NV10TCL_TX_GEN_Q(x) (0x000003cc+((x)*16)) -+#define NV10TCL_TX_GEN_Q__SIZE 0x00000002 -+#define NV10TCL_TX_GEN_Q_FALSE 0x00000000 -+#define NV10TCL_TX_GEN_Q_EYE_LINEAR 0x00002400 -+#define NV10TCL_TX_GEN_Q_OBJECT_LINEAR 0x00002401 -+#define NV10TCL_TX_GEN_Q_SPHERE_MAP 0x00002402 -+#define NV10TCL_TX_GEN_Q_NORMAL_MAP 0x00008511 -+#define NV10TCL_TX_GEN_Q_REFLECTION_MAP 0x00008512 - #define NV10TCL_TX_MATRIX_ENABLE(x) (0x000003e0+((x)*4)) - #define NV10TCL_TX_MATRIX_ENABLE__SIZE 0x00000002 - #define NV10TCL_VIEW_MATRIX_ENABLE 0x000003e8 -@@ -2919,38 +2939,14 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - #define NV10TCL_TX0_MATRIX__SIZE 0x00000010 - #define NV10TCL_TX1_MATRIX(x) (0x00000580+((x)*4)) - #define NV10TCL_TX1_MATRIX__SIZE 0x00000010 --#define NV10TCL_TX_GEN_COEFF_S_A(x) (0x00000600+((x)*64)) --#define NV10TCL_TX_GEN_COEFF_S_A__SIZE 0x00000002 --#define NV10TCL_TX_GEN_COEFF_S_B(x) (0x00000604+((x)*64)) --#define NV10TCL_TX_GEN_COEFF_S_B__SIZE 0x00000002 --#define NV10TCL_TX_GEN_COEFF_S_C(x) (0x00000608+((x)*64)) --#define NV10TCL_TX_GEN_COEFF_S_C__SIZE 0x00000002 --#define NV10TCL_TX_GEN_COEFF_S_D(x) (0x0000060c+((x)*64)) --#define NV10TCL_TX_GEN_COEFF_S_D__SIZE 0x00000002 --#define NV10TCL_TX_GEN_COEFF_T_A(x) (0x00000610+((x)*64)) --#define NV10TCL_TX_GEN_COEFF_T_A__SIZE 0x00000002 --#define NV10TCL_TX_GEN_COEFF_T_B(x) (0x00000614+((x)*64)) --#define NV10TCL_TX_GEN_COEFF_T_B__SIZE 0x00000002 --#define NV10TCL_TX_GEN_COEFF_T_C(x) (0x00000618+((x)*64)) --#define NV10TCL_TX_GEN_COEFF_T_C__SIZE 0x00000002 --#define NV10TCL_TX_GEN_COEFF_T_D(x) (0x0000061c+((x)*64)) --#define NV10TCL_TX_GEN_COEFF_T_D__SIZE 0x00000002 --#define NV10TCL_TX_GEN_COEFF_R_A(x) (0x00000620+((x)*64)) --#define NV10TCL_TX_GEN_COEFF_R_A__SIZE 0x00000002 --#define NV10TCL_TX_GEN_COEFF_R_B(x) (0x00000624+((x)*64)) --#define NV10TCL_TX_GEN_COEFF_R_B__SIZE 0x00000002 --#define NV10TCL_TX_GEN_COEFF_R_C(x) (0x00000628+((x)*64)) --#define NV10TCL_TX_GEN_COEFF_R_C__SIZE 0x00000002 --#define NV10TCL_TX_GEN_COEFF_R_D(x) (0x0000062c+((x)*64)) --#define NV10TCL_TX_GEN_COEFF_R_D__SIZE 0x00000002 --#define NV10TCL_TX_GEN_COEFF_Q_A(x) (0x00000630+((x)*64)) --#define NV10TCL_TX_GEN_COEFF_Q_A__SIZE 0x00000002 --#define NV10TCL_TX_GEN_COEFF_Q_B(x) (0x00000634+((x)*64)) --#define NV10TCL_TX_GEN_COEFF_Q_B__SIZE 0x00000002 --#define NV10TCL_TX_GEN_COEFF_Q_C(x) (0x00000638+((x)*64)) --#define NV10TCL_TX_GEN_COEFF_Q_C__SIZE 0x00000002 --#define NV10TCL_TX_GEN_COEFF_Q_D(x) (0x0000063c+((x)*64)) --#define NV10TCL_TX_GEN_COEFF_Q_D__SIZE 0x00000002 -+#define NV10TCL_CLIP_PLANE_A(x) (0x00000600+((x)*16)) -+#define NV10TCL_CLIP_PLANE_A__SIZE 0x00000008 -+#define NV10TCL_CLIP_PLANE_B(x) (0x00000604+((x)*16)) -+#define NV10TCL_CLIP_PLANE_B__SIZE 0x00000008 -+#define NV10TCL_CLIP_PLANE_C(x) (0x00000608+((x)*16)) -+#define NV10TCL_CLIP_PLANE_C__SIZE 0x00000008 -+#define NV10TCL_CLIP_PLANE_D(x) (0x0000060c+((x)*16)) -+#define NV10TCL_CLIP_PLANE_D__SIZE 0x00000008 - #define NV10TCL_FOG_EQUATION_CONSTANT 0x00000680 - #define NV10TCL_FOG_EQUATION_LINEAR 0x00000684 - #define NV10TCL_FOG_EQUATION_QUADRATIC 0x00000688 -@@ -3126,6 +3122,70 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - #define NV10TCL_VTXFMT_STRIDE_SHIFT 8 - #define NV10TCL_VTXFMT_STRIDE_MASK 0x0000ff00 - #define NV10TCL_VTXFMT_POS_HOMOGENEOUS (1 << 24) -+#define NV10TCL_VERTEX_ARRAY_OFFSET_POS 0x00000d00 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_POS 0x00000d04 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_POS_TYPE_SHIFT 0 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_POS_TYPE_MASK 0x0000000f -+#define NV10TCL_VERTEX_ARRAY_FORMAT_POS_FIELDS_SHIFT 4 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_POS_FIELDS_MASK 0x000000f0 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_POS_STRIDE_SHIFT 8 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_POS_STRIDE_MASK 0x0000ff00 -+#define NV10TCL_VERTEX_ARRAY_OFFSET_COL 0x00000d08 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_COL 0x00000d0c -+#define NV10TCL_VERTEX_ARRAY_FORMAT_COL_TYPE_SHIFT 0 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_COL_TYPE_MASK 0x0000000f -+#define NV10TCL_VERTEX_ARRAY_FORMAT_COL_FIELDS_SHIFT 4 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_COL_FIELDS_MASK 0x000000f0 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_COL_STRIDE_SHIFT 8 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_COL_STRIDE_MASK 0x0000ff00 -+#define NV10TCL_VERTEX_ARRAY_OFFSET_COL2 0x00000d10 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_COL2 0x00000d14 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_COL2_TYPE_SHIFT 0 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_COL2_TYPE_MASK 0x0000000f -+#define NV10TCL_VERTEX_ARRAY_FORMAT_COL2_FIELDS_SHIFT 4 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_COL2_FIELDS_MASK 0x000000f0 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_COL2_STRIDE_SHIFT 8 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_COL2_STRIDE_MASK 0x0000ff00 -+#define NV10TCL_VERTEX_ARRAY_OFFSET_TX0 0x00000d18 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_TX0 0x00000d1c -+#define NV10TCL_VERTEX_ARRAY_FORMAT_TX0_TYPE_SHIFT 0 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_TX0_TYPE_MASK 0x0000000f -+#define NV10TCL_VERTEX_ARRAY_FORMAT_TX0_FIELDS_SHIFT 4 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_TX0_FIELDS_MASK 0x000000f0 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_TX0_STRIDE_SHIFT 8 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_TX0_STRIDE_MASK 0x0000ff00 -+#define NV10TCL_VERTEX_ARRAY_OFFSET_TX1 0x00000d20 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_TX1 0x00000d24 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_TX1_TYPE_SHIFT 0 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_TX1_TYPE_MASK 0x0000000f -+#define NV10TCL_VERTEX_ARRAY_FORMAT_TX1_FIELDS_SHIFT 4 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_TX1_FIELDS_MASK 0x000000f0 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_TX1_STRIDE_SHIFT 8 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_TX1_STRIDE_MASK 0x0000ff00 -+#define NV10TCL_VERTEX_ARRAY_OFFSET_NOR 0x00000d28 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_NOR 0x00000d2c -+#define NV10TCL_VERTEX_ARRAY_FORMAT_NOR_TYPE_SHIFT 0 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_NOR_TYPE_MASK 0x0000000f -+#define NV10TCL_VERTEX_ARRAY_FORMAT_NOR_FIELDS_SHIFT 4 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_NOR_FIELDS_MASK 0x000000f0 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_NOR_STRIDE_SHIFT 8 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_NOR_STRIDE_MASK 0x0000ff00 -+#define NV10TCL_VERTEX_ARRAY_OFFSET_WGH 0x00000d30 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_WGH 0x00000d34 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_WGH_TYPE_SHIFT 0 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_WGH_TYPE_MASK 0x0000000f -+#define NV10TCL_VERTEX_ARRAY_FORMAT_WGH_FIELDS_SHIFT 4 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_WGH_FIELDS_MASK 0x000000f0 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_WGH_STRIDE_SHIFT 8 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_WGH_STRIDE_MASK 0x0000ff00 -+#define NV10TCL_VERTEX_ARRAY_OFFSET_FOG 0x00000d38 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_FOG 0x00000d3c -+#define NV10TCL_VERTEX_ARRAY_FORMAT_FOG_TYPE_SHIFT 0 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_FOG_TYPE_MASK 0x0000000f -+#define NV10TCL_VERTEX_ARRAY_FORMAT_FOG_FIELDS_SHIFT 4 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_FOG_FIELDS_MASK 0x000000f0 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_FOG_STRIDE_SHIFT 8 -+#define NV10TCL_VERTEX_ARRAY_FORMAT_FOG_STRIDE_MASK 0x0000ff00 - #define NV10TCL_VERTEX_BEGIN_END 0x00000dfc - #define NV10TCL_VERTEX_BEGIN_END_STOP 0x00000000 - #define NV10TCL_VERTEX_BEGIN_END_POINTS 0x00000001 -@@ -3965,38 +4025,38 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - #define NV20TCL_ENABLED_LIGHTS_7_NONPOSITIONAL 0x00004000 - #define NV20TCL_ENABLED_LIGHTS_7_POSITIONAL 0x00008000 - #define NV20TCL_ENABLED_LIGHTS_7_DIRECTIONAL 0x0000c000 --#define NV20TCL_TX_GEN_MODE_S(x) (0x000003c0+((x)*16)) --#define NV20TCL_TX_GEN_MODE_S__SIZE 0x00000004 --#define NV20TCL_TX_GEN_MODE_S_FALSE 0x00000000 --#define NV20TCL_TX_GEN_MODE_S_EYE_LINEAR 0x00002400 --#define NV20TCL_TX_GEN_MODE_S_OBJECT_LINEAR 0x00002401 --#define NV20TCL_TX_GEN_MODE_S_SPHERE_MAP 0x00002402 --#define NV20TCL_TX_GEN_MODE_S_NORMAL_MAP 0x00008511 --#define NV20TCL_TX_GEN_MODE_S_REFLECTION_MAP 0x00008512 --#define NV20TCL_TX_GEN_MODE_T(x) (0x000003c4+((x)*16)) --#define NV20TCL_TX_GEN_MODE_T__SIZE 0x00000004 --#define NV20TCL_TX_GEN_MODE_T_FALSE 0x00000000 --#define NV20TCL_TX_GEN_MODE_T_EYE_LINEAR 0x00002400 --#define NV20TCL_TX_GEN_MODE_T_OBJECT_LINEAR 0x00002401 --#define NV20TCL_TX_GEN_MODE_T_SPHERE_MAP 0x00002402 --#define NV20TCL_TX_GEN_MODE_T_NORMAL_MAP 0x00008511 --#define NV20TCL_TX_GEN_MODE_T_REFLECTION_MAP 0x00008512 --#define NV20TCL_TX_GEN_MODE_R(x) (0x000003c8+((x)*16)) --#define NV20TCL_TX_GEN_MODE_R__SIZE 0x00000004 --#define NV20TCL_TX_GEN_MODE_R_FALSE 0x00000000 --#define NV20TCL_TX_GEN_MODE_R_EYE_LINEAR 0x00002400 --#define NV20TCL_TX_GEN_MODE_R_OBJECT_LINEAR 0x00002401 --#define NV20TCL_TX_GEN_MODE_R_SPHERE_MAP 0x00002402 --#define NV20TCL_TX_GEN_MODE_R_NORMAL_MAP 0x00008511 --#define NV20TCL_TX_GEN_MODE_R_REFLECTION_MAP 0x00008512 --#define NV20TCL_TX_GEN_MODE_Q(x) (0x000003cc+((x)*16)) --#define NV20TCL_TX_GEN_MODE_Q__SIZE 0x00000004 --#define NV20TCL_TX_GEN_MODE_Q_FALSE 0x00000000 --#define NV20TCL_TX_GEN_MODE_Q_EYE_LINEAR 0x00002400 --#define NV20TCL_TX_GEN_MODE_Q_OBJECT_LINEAR 0x00002401 --#define NV20TCL_TX_GEN_MODE_Q_SPHERE_MAP 0x00002402 --#define NV20TCL_TX_GEN_MODE_Q_NORMAL_MAP 0x00008511 --#define NV20TCL_TX_GEN_MODE_Q_REFLECTION_MAP 0x00008512 -+#define NV20TCL_TX_GEN_S(x) (0x000003c0+((x)*16)) -+#define NV20TCL_TX_GEN_S__SIZE 0x00000004 -+#define NV20TCL_TX_GEN_S_FALSE 0x00000000 -+#define NV20TCL_TX_GEN_S_EYE_LINEAR 0x00002400 -+#define NV20TCL_TX_GEN_S_OBJECT_LINEAR 0x00002401 -+#define NV20TCL_TX_GEN_S_SPHERE_MAP 0x00002402 -+#define NV20TCL_TX_GEN_S_NORMAL_MAP 0x00008511 -+#define NV20TCL_TX_GEN_S_REFLECTION_MAP 0x00008512 -+#define NV20TCL_TX_GEN_T(x) (0x000003c4+((x)*16)) -+#define NV20TCL_TX_GEN_T__SIZE 0x00000004 -+#define NV20TCL_TX_GEN_T_FALSE 0x00000000 -+#define NV20TCL_TX_GEN_T_EYE_LINEAR 0x00002400 -+#define NV20TCL_TX_GEN_T_OBJECT_LINEAR 0x00002401 -+#define NV20TCL_TX_GEN_T_SPHERE_MAP 0x00002402 -+#define NV20TCL_TX_GEN_T_NORMAL_MAP 0x00008511 -+#define NV20TCL_TX_GEN_T_REFLECTION_MAP 0x00008512 -+#define NV20TCL_TX_GEN_R(x) (0x000003c8+((x)*16)) -+#define NV20TCL_TX_GEN_R__SIZE 0x00000004 -+#define NV20TCL_TX_GEN_R_FALSE 0x00000000 -+#define NV20TCL_TX_GEN_R_EYE_LINEAR 0x00002400 -+#define NV20TCL_TX_GEN_R_OBJECT_LINEAR 0x00002401 -+#define NV20TCL_TX_GEN_R_SPHERE_MAP 0x00002402 -+#define NV20TCL_TX_GEN_R_NORMAL_MAP 0x00008511 -+#define NV20TCL_TX_GEN_R_REFLECTION_MAP 0x00008512 -+#define NV20TCL_TX_GEN_Q(x) (0x000003cc+((x)*16)) -+#define NV20TCL_TX_GEN_Q__SIZE 0x00000004 -+#define NV20TCL_TX_GEN_Q_FALSE 0x00000000 -+#define NV20TCL_TX_GEN_Q_EYE_LINEAR 0x00002400 -+#define NV20TCL_TX_GEN_Q_OBJECT_LINEAR 0x00002401 -+#define NV20TCL_TX_GEN_Q_SPHERE_MAP 0x00002402 -+#define NV20TCL_TX_GEN_Q_NORMAL_MAP 0x00008511 -+#define NV20TCL_TX_GEN_Q_REFLECTION_MAP 0x00008512 - #define NV20TCL_TX_MATRIX_ENABLE(x) (0x00000420+((x)*4)) - #define NV20TCL_TX_MATRIX_ENABLE__SIZE 0x00000004 - #define NV20TCL_POINT_SIZE 0x0000043c -@@ -4026,38 +4086,38 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - #define NV20TCL_TX2_MATRIX__SIZE 0x00000010 - #define NV20TCL_TX3_MATRIX(x) (0x00000780+((x)*4)) - #define NV20TCL_TX3_MATRIX__SIZE 0x00000010 --#define NV20TCL_TX_GEN_COEFF_S_A(x) (0x00000840+((x)*64)) --#define NV20TCL_TX_GEN_COEFF_S_A__SIZE 0x00000004 --#define NV20TCL_TX_GEN_COEFF_S_B(x) (0x00000844+((x)*64)) --#define NV20TCL_TX_GEN_COEFF_S_B__SIZE 0x00000004 --#define NV20TCL_TX_GEN_COEFF_S_C(x) (0x00000848+((x)*64)) --#define NV20TCL_TX_GEN_COEFF_S_C__SIZE 0x00000004 --#define NV20TCL_TX_GEN_COEFF_S_D(x) (0x0000084c+((x)*64)) --#define NV20TCL_TX_GEN_COEFF_S_D__SIZE 0x00000004 --#define NV20TCL_TX_GEN_COEFF_T_A(x) (0x00000850+((x)*64)) --#define NV20TCL_TX_GEN_COEFF_T_A__SIZE 0x00000004 --#define NV20TCL_TX_GEN_COEFF_T_B(x) (0x00000854+((x)*64)) --#define NV20TCL_TX_GEN_COEFF_T_B__SIZE 0x00000004 --#define NV20TCL_TX_GEN_COEFF_T_C(x) (0x00000858+((x)*64)) --#define NV20TCL_TX_GEN_COEFF_T_C__SIZE 0x00000004 --#define NV20TCL_TX_GEN_COEFF_T_D(x) (0x0000085c+((x)*64)) --#define NV20TCL_TX_GEN_COEFF_T_D__SIZE 0x00000004 --#define NV20TCL_TX_GEN_COEFF_R_A(x) (0x00000860+((x)*64)) --#define NV20TCL_TX_GEN_COEFF_R_A__SIZE 0x00000004 --#define NV20TCL_TX_GEN_COEFF_R_B(x) (0x00000864+((x)*64)) --#define NV20TCL_TX_GEN_COEFF_R_B__SIZE 0x00000004 --#define NV20TCL_TX_GEN_COEFF_R_C(x) (0x00000868+((x)*64)) --#define NV20TCL_TX_GEN_COEFF_R_C__SIZE 0x00000004 --#define NV20TCL_TX_GEN_COEFF_R_D(x) (0x0000086c+((x)*64)) --#define NV20TCL_TX_GEN_COEFF_R_D__SIZE 0x00000004 --#define NV20TCL_TX_GEN_COEFF_Q_A(x) (0x00000870+((x)*64)) --#define NV20TCL_TX_GEN_COEFF_Q_A__SIZE 0x00000004 --#define NV20TCL_TX_GEN_COEFF_Q_B(x) (0x00000874+((x)*64)) --#define NV20TCL_TX_GEN_COEFF_Q_B__SIZE 0x00000004 --#define NV20TCL_TX_GEN_COEFF_Q_C(x) (0x00000878+((x)*64)) --#define NV20TCL_TX_GEN_COEFF_Q_C__SIZE 0x00000004 --#define NV20TCL_TX_GEN_COEFF_Q_D(x) (0x0000087c+((x)*64)) --#define NV20TCL_TX_GEN_COEFF_Q_D__SIZE 0x00000004 -+#define NV20TCL_TX0_CLIP_PLANE_A(x) (0x00000840+((x)*16)) -+#define NV20TCL_TX0_CLIP_PLANE_A__SIZE 0x00000004 -+#define NV20TCL_TX0_CLIP_PLANE_B(x) (0x00000844+((x)*16)) -+#define NV20TCL_TX0_CLIP_PLANE_B__SIZE 0x00000004 -+#define NV20TCL_TX0_CLIP_PLANE_C(x) (0x00000848+((x)*16)) -+#define NV20TCL_TX0_CLIP_PLANE_C__SIZE 0x00000004 -+#define NV20TCL_TX0_CLIP_PLANE_D(x) (0x0000084c+((x)*16)) -+#define NV20TCL_TX0_CLIP_PLANE_D__SIZE 0x00000004 -+#define NV20TCL_TX1_CLIP_PLANE_A(x) (0x00000880+((x)*16)) -+#define NV20TCL_TX1_CLIP_PLANE_A__SIZE 0x00000004 -+#define NV20TCL_TX1_CLIP_PLANE_B(x) (0x00000884+((x)*16)) -+#define NV20TCL_TX1_CLIP_PLANE_B__SIZE 0x00000004 -+#define NV20TCL_TX1_CLIP_PLANE_C(x) (0x00000888+((x)*16)) -+#define NV20TCL_TX1_CLIP_PLANE_C__SIZE 0x00000004 -+#define NV20TCL_TX1_CLIP_PLANE_D(x) (0x0000088c+((x)*16)) -+#define NV20TCL_TX1_CLIP_PLANE_D__SIZE 0x00000004 -+#define NV20TCL_TX2_CLIP_PLANE_A(x) (0x000008c0+((x)*16)) -+#define NV20TCL_TX2_CLIP_PLANE_A__SIZE 0x00000004 -+#define NV20TCL_TX2_CLIP_PLANE_B(x) (0x000008c4+((x)*16)) -+#define NV20TCL_TX2_CLIP_PLANE_B__SIZE 0x00000004 -+#define NV20TCL_TX2_CLIP_PLANE_C(x) (0x000008c8+((x)*16)) -+#define NV20TCL_TX2_CLIP_PLANE_C__SIZE 0x00000004 -+#define NV20TCL_TX2_CLIP_PLANE_D(x) (0x000008cc+((x)*16)) -+#define NV20TCL_TX2_CLIP_PLANE_D__SIZE 0x00000004 -+#define NV20TCL_TX3_CLIP_PLANE_A(x) (0x00000900+((x)*16)) -+#define NV20TCL_TX3_CLIP_PLANE_A__SIZE 0x00000004 -+#define NV20TCL_TX3_CLIP_PLANE_B(x) (0x00000904+((x)*16)) -+#define NV20TCL_TX3_CLIP_PLANE_B__SIZE 0x00000004 -+#define NV20TCL_TX3_CLIP_PLANE_C(x) (0x00000908+((x)*16)) -+#define NV20TCL_TX3_CLIP_PLANE_C__SIZE 0x00000004 -- To UNSUBSCRIBE, email to [email protected] with a subject of "unsubscribe". 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