The branch main has been updated by wma: URL: https://cgit.FreeBSD.org/src/commit/?id=a974a7bcdf44a83e344b19778dbd910298fa0421
commit a974a7bcdf44a83e344b19778dbd910298fa0421 Author: Kornel Duleba <[email protected]> AuthorDate: 2022-01-14 11:21:51 +0000 Commit: Wojciech Macek <[email protected]> CommitDate: 2022-02-22 08:58:24 +0000 sdhci_fsl_fdt: Fix pulse width errata application The errata has to be applied every time after SDHCI_RESET_ALL is done. Move it from attach to the custom reset routine. Reviewed by: wma, mmel Obtained from: Semihalf Sponsored by: Alstom Group Differential Revision: https://reviews.freebsd.org/D33981 --- sys/dev/sdhci/sdhci_fsl_fdt.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/sys/dev/sdhci/sdhci_fsl_fdt.c b/sys/dev/sdhci/sdhci_fsl_fdt.c index 41804f6c1a11..5d4052a12a2e 100644 --- a/sys/dev/sdhci/sdhci_fsl_fdt.c +++ b/sys/dev/sdhci/sdhci_fsl_fdt.c @@ -885,16 +885,6 @@ sdhci_fsl_fdt_attach(device_t dev) sc->slot.max_clk = sc->maxclk_hz; sc->gpio = sdhci_fdt_gpio_setup(dev, &sc->slot); - /* - * Pulse width detection is not reliable on some boards. Perform - * workaround by clearing register's bit according to errata. - */ - if (sc->soc_data->errata & SDHCI_FSL_UNRELIABLE_PULSE_DET) { - val = RD4(sc, SDHCI_FSL_DLLCFG1); - val &= ~SDHCI_FSL_DLLCFG1_PULSE_STRETCH; - WR4(sc, SDHCI_FSL_DLLCFG1, val); - } - /* * Set the buffer watermark level to 128 words (512 bytes) for both * read and write. The hardware has a restriction that when the read or @@ -1028,6 +1018,16 @@ sdhci_fsl_fdt_reset(device_t dev, struct sdhci_slot *slot, uint8_t mask) WR4(sc, SDHCI_FSL_TBCTL, val); } + /* + * Pulse width detection is not reliable on some boards. Perform + * workaround by clearing register's bit according to errata. + */ + if (sc->soc_data->errata & SDHCI_FSL_UNRELIABLE_PULSE_DET) { + val = RD4(sc, SDHCI_FSL_DLLCFG1); + val &= ~SDHCI_FSL_DLLCFG1_PULSE_STRETCH; + WR4(sc, SDHCI_FSL_DLLCFG1, val); + } + sc->flags &= ~SDHCI_FSL_HS400_DONE; }
